ZUR SCHNELLEN FEHLERSIMULATION IN KOMBINATORISCHEN SCHALTUNGEN.

The principles of fault simulation and fault grading in combinational circuits will be presented using a general problem description. Based upon the well known concept to restrict fault simulation to the fanout stems and to combine it with a critical path tracing method inside the fanout free regions of the circuit, proposals will be made to further accelerate fault simulation and fault grading. On the one hand these proposals aim at reducing the number of fanout stems for which a fault simulation has to be carried out. On the other hand in order to enable a parallel evaluation of the signal values, it is suggested to utilize the full width of a machine word in all necessary steps of the fault simulation and the fault grading process.