TY - GEN
T1 - X-Centric
T2 - 2020 International Symposium on Memory Systems, MEMSYS 2020
AU - Rheindt, Sven
AU - Sabirov, Temur
AU - Lenke, Oliver
AU - Wild, Thomas
AU - Herkersdorf, Andreas
N1 - Publisher Copyright:
© 2020 ACM.
PY - 2020/9/28
Y1 - 2020/9/28
N2 - Big Data and machine learning constitute the multifaceted challenge of computer engineering in the past decade. The meaningful processing of vast amounts of unstructured data from a myriad of sensors and devices is a complicated endeavor already. Aggravated by the need to enter the extremely power- and resource-constrained pocket-size mobile domain, the computing as we know it is rapidly evolving. Data-centric in- and near-memory computing, as well as highly heterogeneous accelerator-equipped application-centric architectures, are on the rise to tackle the unsatisfiable demand for evermore compute performance and efficiency. To learn from these innovations, this paper surveys compute-, memory-, and application-centric architectures and related programming paradigms and analyzes prominent chances and challenges. The key insights from the particular domains are: 1) The high nominal processing performance of compute-centric systems is thwarted by massively decreasing data-to-task locality and increased data movement. Nevertheless, the commodity of shared-memory programming and the presence of widespread legacy applications keep this domain alive. 2) Memory-centric designs help to mitigate the data locality wall and significantly improve power and performance efficiency. However, a memory-centric programming paradigm is still missing. 3) Heterogeneity, customization, and established ecosystems (like for mobile devices) enable application-centric optimization under often tight thermal, power, and resource constraints. However, a holistic SoC-level design approach is required to utilize and program the diversity of processing units in different application domains efficiently. A one-size-fits-all architecture approach seems not in sight because of the wide diversity in domain-specific requirements and constraints. Therefore, established ecosystems, 3D-stacked logic-enhanced memory devices, and commoditized architecture-aware programming models seem fundamental for performant and programmable future-proof computer architectures.
AB - Big Data and machine learning constitute the multifaceted challenge of computer engineering in the past decade. The meaningful processing of vast amounts of unstructured data from a myriad of sensors and devices is a complicated endeavor already. Aggravated by the need to enter the extremely power- and resource-constrained pocket-size mobile domain, the computing as we know it is rapidly evolving. Data-centric in- and near-memory computing, as well as highly heterogeneous accelerator-equipped application-centric architectures, are on the rise to tackle the unsatisfiable demand for evermore compute performance and efficiency. To learn from these innovations, this paper surveys compute-, memory-, and application-centric architectures and related programming paradigms and analyzes prominent chances and challenges. The key insights from the particular domains are: 1) The high nominal processing performance of compute-centric systems is thwarted by massively decreasing data-to-task locality and increased data movement. Nevertheless, the commodity of shared-memory programming and the presence of widespread legacy applications keep this domain alive. 2) Memory-centric designs help to mitigate the data locality wall and significantly improve power and performance efficiency. However, a memory-centric programming paradigm is still missing. 3) Heterogeneity, customization, and established ecosystems (like for mobile devices) enable application-centric optimization under often tight thermal, power, and resource constraints. However, a holistic SoC-level design approach is required to utilize and program the diversity of processing units in different application domains efficiently. A one-size-fits-all architecture approach seems not in sight because of the wide diversity in domain-specific requirements and constraints. Therefore, established ecosystems, 3D-stacked logic-enhanced memory devices, and commoditized architecture-aware programming models seem fundamental for performant and programmable future-proof computer architectures.
KW - application-centric
KW - architecture evolution
KW - computer architecture
KW - heterogeneous architecture
KW - memory-centric
KW - mobile device
KW - near-memory computing
KW - programming model
KW - roofline model
KW - survey
UR - http://www.scopus.com/inward/record.url?scp=85103538642&partnerID=8YFLogxK
U2 - 10.1145/3422575.3422792
DO - 10.1145/3422575.3422792
M3 - Conference contribution
AN - SCOPUS:85103538642
T3 - ACM International Conference Proceeding Series
SP - 178
EP - 193
BT - MEMSYS 2020 - Proceedings of the International Symposium on Memory Systems
PB - Association for Computing Machinery
Y2 - 28 September 2020 through 1 October 2020
ER -