White-box current source modeling including parameter variation and its application in timing simulation

Christoph Knoth; Irina Eichwald; Petra Nordholz; Ulf Schlichtmann

doi:10.1007/978-3-642-17752-1_20

White-box current source modeling including parameter variation and its application in timing simulation

Christoph Knoth, Irina Eichwald, Petra Nordholz, Ulf Schlichtmann

Chair of Electronic Design Automation

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

2 Scopus citations

Abstract

This paper presents a novel method for generating current source models (CSMs) for logic cells that efficiently captures the influences of parameter variation and supply voltage drops. The characterization exploits topological information from the transistor netlist resulting in typically 80x faster CSM library generation. The parametric CSMs have been integrated into a commercial FastSPICE simulator to further accelerate path-based timing analysis with transistor level accuracy.Without loss of accuracy, simulation times were reduced by 4x to 98x.

Original language	English
Title of host publication	Integrated Circuit and System Design
Subtitle of host publication	Power and Timing Modeling, Optimization and Simulation - 20th International Workshop, PATMOS 2010, Revised Selected Papers
Publisher	Springer Verlag
Pages	200-210
Number of pages	11
ISBN (Print)	3642177514, 9783642177514
DOIs	https://doi.org/10.1007/978-3-642-17752-1_20
State	Published - 2011

Publication series

Name	Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Volume	6448 LNCS
ISSN (Print)	0302-9743
ISSN (Electronic)	1611-3349

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10.1007/978-3-642-17752-1_20

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Knoth, C., Eichwald, I., Nordholz, P., & Schlichtmann, U. (2011). White-box current source modeling including parameter variation and its application in timing simulation. In Integrated Circuit and System Design: Power and Timing Modeling, Optimization and Simulation - 20th International Workshop, PATMOS 2010, Revised Selected Papers (pp. 200-210). (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); Vol. 6448 LNCS). Springer Verlag. https://doi.org/10.1007/978-3-642-17752-1_20

Knoth, Christoph ; Eichwald, Irina ; Nordholz, Petra et al. / White-box current source modeling including parameter variation and its application in timing simulation. Integrated Circuit and System Design: Power and Timing Modeling, Optimization and Simulation - 20th International Workshop, PATMOS 2010, Revised Selected Papers. Springer Verlag, 2011. pp. 200-210 (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)).

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abstract = "This paper presents a novel method for generating current source models (CSMs) for logic cells that efficiently captures the influences of parameter variation and supply voltage drops. The characterization exploits topological information from the transistor netlist resulting in typically 80x faster CSM library generation. The parametric CSMs have been integrated into a commercial FastSPICE simulator to further accelerate path-based timing analysis with transistor level accuracy.Without loss of accuracy, simulation times were reduced by 4x to 98x.",

author = "Christoph Knoth and Irina Eichwald and Petra Nordholz and Ulf Schlichtmann",

note = "Funding Information: This work has been supported by the German Ministry of Education and Research (BMBF) within the project {\textquoteright}Sigma65{\textquoteright} (Project ID 01M3080A). The content is the sole responsibility of the authors.",

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doi = "10.1007/978-3-642-17752-1_20",

language = "English",

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Knoth, C, Eichwald, I, Nordholz, P & Schlichtmann, U 2011, White-box current source modeling including parameter variation and its application in timing simulation. in Integrated Circuit and System Design: Power and Timing Modeling, Optimization and Simulation - 20th International Workshop, PATMOS 2010, Revised Selected Papers. Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), vol. 6448 LNCS, Springer Verlag, pp. 200-210. https://doi.org/10.1007/978-3-642-17752-1_20

White-box current source modeling including parameter variation and its application in timing simulation. / Knoth, Christoph; Eichwald, Irina; Nordholz, Petra et al.
Integrated Circuit and System Design: Power and Timing Modeling, Optimization and Simulation - 20th International Workshop, PATMOS 2010, Revised Selected Papers. Springer Verlag, 2011. p. 200-210 (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); Vol. 6448 LNCS).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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T1 - White-box current source modeling including parameter variation and its application in timing simulation

AU - Knoth, Christoph

AU - Eichwald, Irina

AU - Nordholz, Petra

AU - Schlichtmann, Ulf

N1 - Funding Information: This work has been supported by the German Ministry of Education and Research (BMBF) within the project ’Sigma65’ (Project ID 01M3080A). The content is the sole responsibility of the authors.

PY - 2011

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N2 - This paper presents a novel method for generating current source models (CSMs) for logic cells that efficiently captures the influences of parameter variation and supply voltage drops. The characterization exploits topological information from the transistor netlist resulting in typically 80x faster CSM library generation. The parametric CSMs have been integrated into a commercial FastSPICE simulator to further accelerate path-based timing analysis with transistor level accuracy.Without loss of accuracy, simulation times were reduced by 4x to 98x.

AB - This paper presents a novel method for generating current source models (CSMs) for logic cells that efficiently captures the influences of parameter variation and supply voltage drops. The characterization exploits topological information from the transistor netlist resulting in typically 80x faster CSM library generation. The parametric CSMs have been integrated into a commercial FastSPICE simulator to further accelerate path-based timing analysis with transistor level accuracy.Without loss of accuracy, simulation times were reduced by 4x to 98x.

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DO - 10.1007/978-3-642-17752-1_20

M3 - Conference contribution

AN - SCOPUS:85037529103

SN - 3642177514

SN - 9783642177514

T3 - Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

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BT - Integrated Circuit and System Design

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Knoth C, Eichwald I, Nordholz P, Schlichtmann U. White-box current source modeling including parameter variation and its application in timing simulation. In Integrated Circuit and System Design: Power and Timing Modeling, Optimization and Simulation - 20th International Workshop, PATMOS 2010, Revised Selected Papers. Springer Verlag. 2011. p. 200-210. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)). doi: 10.1007/978-3-642-17752-1_20

White-box current source modeling including parameter variation and its application in timing simulation

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