TY - GEN
T1 - Where formal verification can help in functional safety analysis
AU - Bernardini, Alessandro
AU - Ecker, Wolfgang
AU - Schlichtmann, Ulf
N1 - Publisher Copyright:
© 2016 ACM.
PY - 2016/11/7
Y1 - 2016/11/7
N2 - Formal techniques seem to be a way to cope with the exploding complexity of functional safety analysis. Here, the overall fault propagation probability to a certain safety-point in the design must be analyzed. As a consequence, the careful verification of the design is no longer sufficient. In addition, the propagation of all possible faults potentially showing up at all of the design's internal nodes must be validated. But this is not only a complexity challenge. Safety standards have a probabilistic view on functional safety analysis results and aspects such as different fault and pattern probability must be considered and related to requirements such as confidence level and maximum FIT rate. Following an overview on verification challenges around functional safety analysis, we introduce our innovative concept on how formal formal techniques can substantially simplify industrial functional safety analysis flows. Given a transient fault, the conditional error propagation probability must be analyzed. An error has propagated if it did eventually cause a counterexample to a safety property. If we can prove formally that such a counterexample is not possible, we have shown that the fault was not critical. We have to estimate how often on average faults will propagate. For this purpose a test bench traditionally generates input pattern sequences and then Monte Carlo fault injection is performed. Simulations are continued for evaluating the effects of the injected faults. In this paper we show how invariants generated with property directed reachability (PDR) model checking can be used to speed up traditional Monte Carlo fault injection. The invariant obtained with PDR can be used to show that the system remains safe after injected faults. Unnecessary simulations are avoided and a significant speedup for sample evaluation is obtained.
AB - Formal techniques seem to be a way to cope with the exploding complexity of functional safety analysis. Here, the overall fault propagation probability to a certain safety-point in the design must be analyzed. As a consequence, the careful verification of the design is no longer sufficient. In addition, the propagation of all possible faults potentially showing up at all of the design's internal nodes must be validated. But this is not only a complexity challenge. Safety standards have a probabilistic view on functional safety analysis results and aspects such as different fault and pattern probability must be considered and related to requirements such as confidence level and maximum FIT rate. Following an overview on verification challenges around functional safety analysis, we introduce our innovative concept on how formal formal techniques can substantially simplify industrial functional safety analysis flows. Given a transient fault, the conditional error propagation probability must be analyzed. An error has propagated if it did eventually cause a counterexample to a safety property. If we can prove formally that such a counterexample is not possible, we have shown that the fault was not critical. We have to estimate how often on average faults will propagate. For this purpose a test bench traditionally generates input pattern sequences and then Monte Carlo fault injection is performed. Simulations are continued for evaluating the effects of the injected faults. In this paper we show how invariants generated with property directed reachability (PDR) model checking can be used to speed up traditional Monte Carlo fault injection. The invariant obtained with PDR can be used to show that the system remains safe after injected faults. Unnecessary simulations are avoided and a significant speedup for sample evaluation is obtained.
KW - fault injection
KW - formal verification
KW - invariants
KW - monte carlo simulation
KW - property directed reachability
UR - http://www.scopus.com/inward/record.url?scp=85001019687&partnerID=8YFLogxK
U2 - 10.1145/2966986.2980087
DO - 10.1145/2966986.2980087
M3 - Conference contribution
AN - SCOPUS:85001019687
T3 - IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD
BT - 2016 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2016
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 35th IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2016
Y2 - 7 November 2016 through 10 November 2016
ER -