Ways towards the scaleable integration of carbon nanotubes into silicon based technology

The outstanding performance of carbon nanotubes (CNTs) as interconnects and microelectronic devices has been shown in a number of experiments on hand-picked demonstrators. However, for implementation parallel manufacture, which involves the precise placement and the simultaneous control over the properties of millions of CNTs with microelectronic compatible processes is required. Various concepts for the large-scale integration of CNT-based electronics are compared in this presentation. One of them, catalyst mediated CVD growth, allows the direct growth of CNTs on silicon substrates. Methods for structuring the substrates and the catalyst materials on wafer scale as well as the influence of the process parameters are discussed in terms of reproducibility and uniformity. Furthermore, the synthesis of single, isolated multiwalled CNTs with lithographically defined diameters and locations has been established. This resembles the creation of vertical interconnects consisting of individual and multiple multiwalled CNTs. From this base, a concept for the assembly of CNT based, vertical, surrounding-gate transistors is presented.