Wait-free message passing protocol for non-coherent shared memory architectures

Isaías A. Comprés Ureña; Michael Gerndt; Carsten Trinitis

doi:10.1007/978-3-642-33518-1_19

Wait-free message passing protocol for non-coherent shared memory architectures

Isaías A. Comprés Ureña, Michael Gerndt, Carsten Trinitis

Informatics 10 - Associate Professorship of Architecture of Parallel and Distributed Systems
Informatics 10 - Chair of Computer Architecture and Parallel Systems

Technical University of Munich

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

1 Scopus citations

Abstract

The number of cores in future CPUs is expected to increase steadily. Balanced CPU designs scale hardware cache coherency functionality according to the number of cores, in order to minimize bottlenecks in parallel applications. An alternative approach is to do away with hardware coherence entirely; the Single-chip Cloud Computer (SCC), a 48 core experimental processor from Intel labs, does exactly that. A wait-free protocol for message passing on non-coherent buffers was introduced with the RCKMPI library, in order to support MPI on the SCC. In this work, the message passing performance of the protocol is modeled. Additionally, a port for symmetric multi-processors is introduced and used for comparison with MPICH2-Nemesis and Open MPI. Performance is analyzed based on statistics collected on a 4-dimensional space composed of source rank, target rank, message size and frequency.

Original language	English
Title of host publication	Recent Advances in the Message Passing Interface - 19th European MPI Users' Group Meeting, EuroMPI 2012, Proceedings
Pages	142-152
Number of pages	11
DOIs	https://doi.org/10.1007/978-3-642-33518-1_19
State	Published - 2012
Event	19th European MPI Users' Group Meeting on Recent Advances in the Message Passing Interface, EuroMPI 2012 - Vienna, Austria Duration: 23 Sep 2012 → 26 Sep 2012

Publication series

Name	Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Volume	7490 LNCS
ISSN (Print)	0302-9743
ISSN (Electronic)	1611-3349

Conference

Conference	19th European MPI Users' Group Meeting on Recent Advances in the Message Passing Interface, EuroMPI 2012
Country/Territory	Austria
City	Vienna
Period	23/09/12 → 26/09/12

Keywords

MPI
communication protocol
message passing
non-blocking
non-coherent shared memory
wait-free

Access to Document

10.1007/978-3-642-33518-1_19

Cite this

Comprés Ureña, I. A., Gerndt, M., & Trinitis, C. (2012). Wait-free message passing protocol for non-coherent shared memory architectures. In Recent Advances in the Message Passing Interface - 19th European MPI Users' Group Meeting, EuroMPI 2012, Proceedings (pp. 142-152). (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); Vol. 7490 LNCS). https://doi.org/10.1007/978-3-642-33518-1_19

Comprés Ureña, Isaías A. ; Gerndt, Michael ; Trinitis, Carsten. / Wait-free message passing protocol for non-coherent shared memory architectures. Recent Advances in the Message Passing Interface - 19th European MPI Users' Group Meeting, EuroMPI 2012, Proceedings. 2012. pp. 142-152 (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)).

@inproceedings{a0c7cc1c84724d4f8c637fe29c7d5894,

title = "Wait-free message passing protocol for non-coherent shared memory architectures",

abstract = "The number of cores in future CPUs is expected to increase steadily. Balanced CPU designs scale hardware cache coherency functionality according to the number of cores, in order to minimize bottlenecks in parallel applications. An alternative approach is to do away with hardware coherence entirely; the Single-chip Cloud Computer (SCC), a 48 core experimental processor from Intel labs, does exactly that. A wait-free protocol for message passing on non-coherent buffers was introduced with the RCKMPI library, in order to support MPI on the SCC. In this work, the message passing performance of the protocol is modeled. Additionally, a port for symmetric multi-processors is introduced and used for comparison with MPICH2-Nemesis and Open MPI. Performance is analyzed based on statistics collected on a 4-dimensional space composed of source rank, target rank, message size and frequency.",

keywords = "MPI, communication protocol, message passing, non-blocking, non-coherent shared memory, wait-free",

author = "{Compr{\'e}s Ure{\~n}a}, {Isa{\'i}as A.} and Michael Gerndt and Carsten Trinitis",

note = "Funding Information: Support for this work was provided by the Transregional Collaborative Research Centre 89: Invasive Computing (InvasIC) [7].; 19th European MPI Users' Group Meeting on Recent Advances in the Message Passing Interface, EuroMPI 2012 ; Conference date: 23-09-2012 Through 26-09-2012",

year = "2012",

doi = "10.1007/978-3-642-33518-1_19",

language = "English",

isbn = "9783642335174",

series = "Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)",

pages = "142--152",

booktitle = "Recent Advances in the Message Passing Interface - 19th European MPI Users' Group Meeting, EuroMPI 2012, Proceedings",

}

Comprés Ureña, IA, Gerndt, M & Trinitis, C 2012, Wait-free message passing protocol for non-coherent shared memory architectures. in Recent Advances in the Message Passing Interface - 19th European MPI Users' Group Meeting, EuroMPI 2012, Proceedings. Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), vol. 7490 LNCS, pp. 142-152, 19th European MPI Users' Group Meeting on Recent Advances in the Message Passing Interface, EuroMPI 2012, Vienna, Austria, 23/09/12. https://doi.org/10.1007/978-3-642-33518-1_19

Wait-free message passing protocol for non-coherent shared memory architectures. / Comprés Ureña, Isaías A.; Gerndt, Michael ; Trinitis, Carsten.
Recent Advances in the Message Passing Interface - 19th European MPI Users' Group Meeting, EuroMPI 2012, Proceedings. 2012. p. 142-152 (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); Vol. 7490 LNCS).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - Wait-free message passing protocol for non-coherent shared memory architectures

AU - Comprés Ureña, Isaías A.

AU - Gerndt, Michael

AU - Trinitis, Carsten

N1 - Funding Information: Support for this work was provided by the Transregional Collaborative Research Centre 89: Invasive Computing (InvasIC) [7].

PY - 2012

Y1 - 2012

N2 - The number of cores in future CPUs is expected to increase steadily. Balanced CPU designs scale hardware cache coherency functionality according to the number of cores, in order to minimize bottlenecks in parallel applications. An alternative approach is to do away with hardware coherence entirely; the Single-chip Cloud Computer (SCC), a 48 core experimental processor from Intel labs, does exactly that. A wait-free protocol for message passing on non-coherent buffers was introduced with the RCKMPI library, in order to support MPI on the SCC. In this work, the message passing performance of the protocol is modeled. Additionally, a port for symmetric multi-processors is introduced and used for comparison with MPICH2-Nemesis and Open MPI. Performance is analyzed based on statistics collected on a 4-dimensional space composed of source rank, target rank, message size and frequency.

AB - The number of cores in future CPUs is expected to increase steadily. Balanced CPU designs scale hardware cache coherency functionality according to the number of cores, in order to minimize bottlenecks in parallel applications. An alternative approach is to do away with hardware coherence entirely; the Single-chip Cloud Computer (SCC), a 48 core experimental processor from Intel labs, does exactly that. A wait-free protocol for message passing on non-coherent buffers was introduced with the RCKMPI library, in order to support MPI on the SCC. In this work, the message passing performance of the protocol is modeled. Additionally, a port for symmetric multi-processors is introduced and used for comparison with MPICH2-Nemesis and Open MPI. Performance is analyzed based on statistics collected on a 4-dimensional space composed of source rank, target rank, message size and frequency.

KW - MPI

KW - communication protocol

KW - message passing

KW - non-blocking

KW - non-coherent shared memory

KW - wait-free

UR - http://www.scopus.com/inward/record.url?scp=84867636029&partnerID=8YFLogxK

U2 - 10.1007/978-3-642-33518-1_19

DO - 10.1007/978-3-642-33518-1_19

M3 - Conference contribution

AN - SCOPUS:84867636029

SN - 9783642335174

T3 - Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

SP - 142

EP - 152

BT - Recent Advances in the Message Passing Interface - 19th European MPI Users' Group Meeting, EuroMPI 2012, Proceedings

T2 - 19th European MPI Users' Group Meeting on Recent Advances in the Message Passing Interface, EuroMPI 2012

Y2 - 23 September 2012 through 26 September 2012

ER -

Comprés Ureña IA, Gerndt M , Trinitis C. Wait-free message passing protocol for non-coherent shared memory architectures. In Recent Advances in the Message Passing Interface - 19th European MPI Users' Group Meeting, EuroMPI 2012, Proceedings. 2012. p. 142-152. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)). doi: 10.1007/978-3-642-33518-1_19

Wait-free message passing protocol for non-coherent shared memory architectures

Abstract

Publication series

Conference

Keywords

Access to Document

Other files and links

Fingerprint

Cite this