Voltage gradient limitation of IGBTs by optimised gate-current profiles

G. Schmitt, R. Kennel, J. Holtz

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

36 Scopus citations

Abstract

Using MOS-controlled semiconductors provide the opportunity to directly affect the voltage and currents gradients during the switching transients at the gate. An active gate driver is presented that imposes optimised gate current profiles in order to limit the dv/dt and di/dt. When limiting the dv/dt to 1 kV/μs the switching losses are be reduced by 35% in comparison to the common limitation method by gate resistor. The switch-off losses are improved about 10% by employing an optimised gate signal.

Original languageEnglish
Title of host publicationPESC '08 - 39th IEEE Annual Power Electronics Specialists Conference - Proceedings
Pages3592-3596
Number of pages5
DOIs
StatePublished - 2008
Externally publishedYes
EventPESC '08 - 39th IEEE Annual Power Electronics Specialists Conference - Rhodes, Greece
Duration: 15 Jun 200819 Jun 2008

Publication series

NamePESC Record - IEEE Annual Power Electronics Specialists Conference
ISSN (Print)0275-9306

Conference

ConferencePESC '08 - 39th IEEE Annual Power Electronics Specialists Conference
Country/TerritoryGreece
CityRhodes
Period15/06/0819/06/08

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