Abstract
We present a brief survey of vertical transistor devices fabricated by the cleaved-edge overgrowth technique. Different device types are realized using different transistor substrates grown by molecular beam epitaxy. These substrates mainly vary in the layer sequence and thickness between the source/drain contacts. Common to all designs is the vertical gate structure overgrown on a cleavage plane of the substrates. By biasing the gate a two-dimensional electron system of tunable density is induced between source/drain. We study the DC transport properties of long channel (source-drain distance ∼ 1 μm) as well as short-channel (source-drain distance ∼ 50 nm) devices. Also the choice of the source/drain isolation (a superlattice or a p+-δ-doping or a heterobarrier) affects the characteristic device behavior.
Original language | English |
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Pages (from-to) | 920-924 |
Number of pages | 5 |
Journal | Physica E: Low-Dimensional Systems and Nanostructures |
Volume | 13 |
Issue number | 2-4 |
DOIs | |
State | Published - Mar 2002 |
Keywords
- Cleaved-edge overgrowth
- DC transport
- Vertical transistor