Using higher levels of abstraction for solving optimization problems by Boolean Satisfiability

Robert Wille, Daniel Große, Mathias Soeken, Rolf Drechsler

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

7 Scopus citations

Abstract

Optimization problems can be solved using Boolean Satisfiability by mapping them to a sequence of decision problems. Therefore, in the last years several encodings have been developed. Independently, also new solvers have been introduced lifting Boolean Satisfiability to higher levels of abstraction, e.g. SAT Modulo Theories (SMT) solvers and word level solvers. Both support bit-vector logic and thus allow more compact encodings of the problems. In this paper we investigate the efficiency of these new solver paradigms applied to optimization problems. We show for two case studies - graph coloring and exact synthesis of reversible logic - that the resulting problem instances can be reduced with respect to the size. In addition for the synthesis problem significant run-time improvements can be achieved.

Original languageEnglish
Title of host publicationProceedings - IEEE Computer Society Annual Symposium on VLSI
Subtitle of host publicationTrends in VLSI Technology and Design, ISVLSI 2008
Pages411-416
Number of pages6
DOIs
StatePublished - 2008
Externally publishedYes
EventIEEE Computer Society Annual Symposium on VLSI: Trends in VLSI Technology and Design, ISVLSI 2008 - Montpellier, France
Duration: 7 Apr 20089 Apr 2008

Publication series

NameProceedings - IEEE Computer Society Annual Symposium on VLSI: Trends in VLSI Technology and Design, ISVLSI 2008

Conference

ConferenceIEEE Computer Society Annual Symposium on VLSI: Trends in VLSI Technology and Design, ISVLSI 2008
Country/TerritoryFrance
CityMontpellier
Period7/04/089/04/08

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