Two level compact simulation methodology for timing analysis of power-switched circuits

Stephan Henzler; Georg Georgakos; Jörg Berthold; Doris Schmitt-Landsiedel

doi:10.1007/978-3-540-30205-6_81

Two level compact simulation methodology for timing analysis of power-switched circuits

Stephan Henzler, Georg Georgakos, Jörg Berthold, Doris Schmitt-Landsiedel

Research output: Chapter in Book/Report/Conference proceeding › Chapter › peer-review

2 Scopus citations

Abstract

Standby-power dissipation in ultra-deep submicron CMOS can be reduced by power switching. As the cut-off device has a strong impact on area consumption, minimum power-down time, signal delay and leakage suppression, a proper sizing of this device is of general importance. Therefore a two level compact simulation methodology is proposed which provides fast and accurate CAD support to the switch design task.

Original language	English
Title of host publication	Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Editors	Enrico Macii, Vassilis Paliouras, Odysseas Koufopavlou
Publisher	Springer Verlag
Pages	789-798
Number of pages	10
ISBN (Print)	3540230955
DOIs	https://doi.org/10.1007/978-3-540-30205-6_81
State	Published - 2004
Externally published	Yes

Publication series

Name	Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Volume	3254
ISSN (Print)	0302-9743
ISSN (Electronic)	1611-3349

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10.1007/978-3-540-30205-6_81

Cite this

Henzler, S., Georgakos, G., Berthold, J., & Schmitt-Landsiedel, D. (2004). Two level compact simulation methodology for timing analysis of power-switched circuits. In E. Macii, V. Paliouras, & O. Koufopavlou (Eds.), Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) (pp. 789-798). (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); Vol. 3254). Springer Verlag. https://doi.org/10.1007/978-3-540-30205-6_81

Henzler, Stephan ; Georgakos, Georg ; Berthold, Jörg et al. / Two level compact simulation methodology for timing analysis of power-switched circuits. Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). editor / Enrico Macii ; Vassilis Paliouras ; Odysseas Koufopavlou. Springer Verlag, 2004. pp. 789-798 (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)).

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author = "Stephan Henzler and Georg Georgakos and J{\"o}rg Berthold and Doris Schmitt-Landsiedel",

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Henzler, S, Georgakos, G, Berthold, J & Schmitt-Landsiedel, D 2004, Two level compact simulation methodology for timing analysis of power-switched circuits. in E Macii, V Paliouras & O Koufopavlou (eds), Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), vol. 3254, Springer Verlag, pp. 789-798. https://doi.org/10.1007/978-3-540-30205-6_81

Two level compact simulation methodology for timing analysis of power-switched circuits. / Henzler, Stephan; Georgakos, Georg; Berthold, Jörg et al.
Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). ed. / Enrico Macii; Vassilis Paliouras; Odysseas Koufopavlou. Springer Verlag, 2004. p. 789-798 (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); Vol. 3254).

Research output: Chapter in Book/Report/Conference proceeding › Chapter › peer-review

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AB - Standby-power dissipation in ultra-deep submicron CMOS can be reduced by power switching. As the cut-off device has a strong impact on area consumption, minimum power-down time, signal delay and leakage suppression, a proper sizing of this device is of general importance. Therefore a two level compact simulation methodology is proposed which provides fast and accurate CAD support to the switch design task.

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T3 - Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

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BT - Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

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Henzler S, Georgakos G, Berthold J, Schmitt-Landsiedel D. Two level compact simulation methodology for timing analysis of power-switched circuits. In Macii E, Paliouras V, Koufopavlou O, editors, Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). Springer Verlag. 2004. p. 789-798. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)). doi: 10.1007/978-3-540-30205-6_81

Two level compact simulation methodology for timing analysis of power-switched circuits

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