TSV-virtualization for multi-protocol-interconnect in 3D-ICs

Keyphrases

• Virtualization 100%
• Through Silicon via 100%
• Multi-protocol 100%
• 3D IC 100%
• Circuitry 10%
• Capacitive Load 10%
• 2D to 3D 10%
• NoCs 10%
• Intralayer 10%
• IP Blocks 10%
• Chip Area 10%
• Wirelength 10%
• Overall Yield 10%
• Manufacturing Challenges 10%
• Fast Connection 10%
• Blocking Scheme 10%
• Silicon Layer 10%
• Crossbar 10%
• Virtual Link 10%
• 3D Design 10%
• 3D Stacking 10%
• Vertical Connection 10%
• Short Wire 10%
• IP Interconnection 10%
• Method Choice 10%
• Multiplexed 10%
• Interconnection Schemes 10%
• Low Capacitance 10%

Engineering

• Interconnects 100%
• Three Dimensional Integrated Circuits 100%
• Virtualizations 100%
• Link Layer 50%
• Chip Area 50%
• Silicon Layer 50%
• Intellectual Property Core 50%
• Capacitive Load 50%

Computer Science

• Virtualizations 100%
• through silicon vias 100%
• Integrated Circuit 100%