Abstract
This paper describes the activities and goals of the European working group on synthesis requirements for VHDL and lists some of the problems concerning the use of VHDL at RT level.
Original language | English |
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Title of host publication | European Design Automation Conference |
Publisher | Publ by IEEE |
Pages | 682 |
Number of pages | 1 |
ISBN (Print) | 0818627808 |
State | Published - 1992 |
Externally published | Yes |
Event | European Design Automation Conference -EURO-VHDL '92 - Hamburg, Ger Duration: 7 Sep 1992 → 10 Sep 1992 |
Publication series
Name | European Design Automation Conference |
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Conference
Conference | European Design Automation Conference -EURO-VHDL '92 |
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City | Hamburg, Ger |
Period | 7/09/92 → 10/09/92 |