Towards a common RT-level subset of VHDL

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

2 Scopus citations

Abstract

This paper describes the activities and goals of the European working group on synthesis requirements for VHDL and lists some of the problems concerning the use of VHDL at RT level.

Original languageEnglish
Title of host publicationEuropean Design Automation Conference
PublisherPubl by IEEE
Pages682
Number of pages1
ISBN (Print)0818627808
StatePublished - 1992
Externally publishedYes
EventEuropean Design Automation Conference -EURO-VHDL '92 - Hamburg, Ger
Duration: 7 Sep 199210 Sep 1992

Publication series

NameEuropean Design Automation Conference

Conference

ConferenceEuropean Design Automation Conference -EURO-VHDL '92
CityHamburg, Ger
Period7/09/9210/09/92

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