TY - GEN
T1 - Time-differential sense amplifier for sub-80mV bitline voltage embedded STT-MRAM in 40nm CMOS
AU - Jefremow, Mihail
AU - Kern, Thomas
AU - Allers, Wolf
AU - Peters, Christian
AU - Otterstedt, Jan
AU - Bahlous, Othmane
AU - Hofmann, Karl
AU - Allinger, Robert
AU - Kassenetter, Stephan
AU - Schmitt-Landsiedel, Doris
PY - 2013
Y1 - 2013
N2 - Spin-torque-transfer (STT) MRAM is a promising candidate for embedded non-volatile memory in next generation microcontrollers, because of superior endurance, low process costs and logic supply voltage operation. Two major drawbacks of STT-MRAM technology are the small read window because of the low tunnel magnetic resistance (TMR) ratio, and the low read current due to read disturb, which is proportional to the bitline (BL) voltage [1].
AB - Spin-torque-transfer (STT) MRAM is a promising candidate for embedded non-volatile memory in next generation microcontrollers, because of superior endurance, low process costs and logic supply voltage operation. Two major drawbacks of STT-MRAM technology are the small read window because of the low tunnel magnetic resistance (TMR) ratio, and the low read current due to read disturb, which is proportional to the bitline (BL) voltage [1].
UR - http://www.scopus.com/inward/record.url?scp=84876569504&partnerID=8YFLogxK
U2 - 10.1109/ISSCC.2013.6487706
DO - 10.1109/ISSCC.2013.6487706
M3 - Conference contribution
AN - SCOPUS:84876569504
SN - 9781467345132
T3 - Digest of Technical Papers - IEEE International Solid-State Circuits Conference
SP - 216
EP - 217
BT - 2013 IEEE International Solid-State Circuits Conference, ISSCC 2013 - Digest of Technical Papers
T2 - 2013 60th IEEE International Solid-State Circuits Conference, ISSCC 2013
Y2 - 17 February 2013 through 21 February 2013
ER -