@inproceedings{5db87a2c62bd451ca957c4c9ec936c50,
title = "Testbenches for advanced TLM verification",
abstract = "As verification activities dominate the systems development process efficient testbenches at an adequate level of abstraction are crucial factors to shorten time-to-market. We give an overview of the current state of ESL testbenches and the corresponding articles of the special session show advances and future directions of IEEE-1600-2011 SystemC in the context of testbenches for Transaction Level Modeling (TLM) [5][6][12][15][16].",
keywords = "SystemC, Testbenches, Verification",
author = "Wolfgang Mueller and Wolfgang Ecker",
year = "2012",
doi = "10.1145/2380445.2380495",
language = "English",
isbn = "9781450314268",
series = "CODES+ISSS'12 - Proceedings of the 10th ACM International Conference on Hardware/Software-Codesign and System Synthesis, Co-located with ESWEEK",
pages = "305",
booktitle = "CODES+ISSS'12 - Proceedings of the 10th ACM International Conference on Hardware/Software-Codesign and System Synthesis, Co-located with ESWEEK",
note = "10th ACM International Conference on Hardware/Software-Codesign and System Synthesis, CODES+ISSS 2012, Co-located with 8th Embedded Systems Week, ESWEEK 2012 ; Conference date: 07-10-2012 Through 12-10-2012",
}