Abstract
We provide a review of the state of the art and the future of packet processing and switching. The industry's response to the need for wire-speed packet processing devices whose function can be rapidly adapted to continuously changing standards and customer requirements is the concept of special programmable network processors. We discuss the prerequisites of processing tens to hundreds of millions of packets per second and indicate ways to achieve scalability through parallel packet processing. Tomorrow's switch fabrics, which will provide node-internal connectivity between the input and output ports of a router or switch, will have to sustain terabit-per-second throughput. After reviewing fundamental switching concepts, we discuss architectural and design issues that must be addressed to allow the evolution of packet switch fabrics to terabit-per-second throughput performance.
Original language | English |
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Pages (from-to) | 70-77 |
Number of pages | 8 |
Journal | IEEE Communications Magazine |
Volume | 39 |
Issue number | 1 |
DOIs | |
State | Published - Jan 2001 |
Externally published | Yes |