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Tackling the MPSoC data locality challenge
Sven Rheindt
, Akshay Srlvatsa
, Oliver Lenke
, Lars Nolte
, Thomas Wild
,
Andreas Herkersdorf
Chair of Integrated Systems
Technical University of Munich
Research output
:
Chapter in Book/Report/Conference proceeding
›
Chapter
›
peer-review
Overview
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Keyphrases
Multi-processor System-on-chip (MPSoC)
100%
Data Locality
100%
Cache Coherence
100%
Region-based
66%
Caching
66%
Near-memory Acceleration
66%
Distributed Storage
33%
Multicore Processors
33%
Tile-based
33%
Complementary Approach
33%
Computational Effectiveness
33%
Shared Memory
33%
Cache Hierarchy
33%
Shared Memory Architecture
33%
Native Varieties
33%
Data Access Latency
33%
Bandwidth Bottleneck
33%
Hybrid Form
33%
Many-core Processor Architecture
33%
Application Composition
33%
Normal Core
33%
Spatially Confined
33%
Near-memory
33%
Computer Science
Data Locality
100%
Cache Coherence
100%
Many-Core
33%
Core Processor
33%
Data Access
33%
Multicore
33%
Cache Hierarchy
33%
Shared Memory Architecture
33%
Shared Memory Model
33%
Limiting Factor
33%
Processor Architecture
33%
Shared Memory
33%