Systolic architectures and applications for nanomagnet logic

M. Niemier; X. Ju; M. Becherer; G. Csaba; X. S. Hu; D. Schmitt-Landsiedel; P. Lugli; W. Porod

doi:10.1109/SNW.2012.6243329

Systolic architectures and applications for nanomagnet logic

M. Niemier, X. Ju, M. Becherer, G. Csaba, X. S. Hu, D. Schmitt-Landsiedel, P. Lugli, W. Porod

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

8 Scopus citations

Abstract

Most NML research has studied small magnet ensembles for interconnect or isolated gates. We discuss how NML might be used to process information, as well as suitable system architecture-to-device architecture mappings. A case study for pattern matching hardware is presented.

Original language	English
Title of host publication	2012 IEEE Silicon Nanoelectronics Workshop, SNW 2012
DOIs	https://doi.org/10.1109/SNW.2012.6243329
State	Published - 2012
Event	2012 17th IEEE Silicon Nanoelectronics Workshop, SNW 2012 - Honolulu, HI, United States Duration: 10 Jun 2012 → 11 Jun 2012

Publication series

Name	2012 IEEE Silicon Nanoelectronics Workshop, SNW 2012

Conference

Conference	2012 17th IEEE Silicon Nanoelectronics Workshop, SNW 2012
Country/Territory	United States
City	Honolulu, HI
Period	10/06/12 → 11/06/12

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10.1109/SNW.2012.6243329

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title = "Systolic architectures and applications for nanomagnet logic",

abstract = "Most NML research has studied small magnet ensembles for interconnect or isolated gates. We discuss how NML might be used to process information, as well as suitable system architecture-to-device architecture mappings. A case study for pattern matching hardware is presented.",

author = "M. Niemier and X. Ju and M. Becherer and G. Csaba and Hu, {X. S.} and D. Schmitt-Landsiedel and P. Lugli and W. Porod",

year = "2012",

doi = "10.1109/SNW.2012.6243329",

language = "English",

isbn = "9781467309943",

series = "2012 IEEE Silicon Nanoelectronics Workshop, SNW 2012",

booktitle = "2012 IEEE Silicon Nanoelectronics Workshop, SNW 2012",

note = "2012 17th IEEE Silicon Nanoelectronics Workshop, SNW 2012 ; Conference date: 10-06-2012 Through 11-06-2012",

}

Niemier, M, Ju, X, Becherer, M, Csaba, G, Hu, XS, Schmitt-Landsiedel, D, Lugli, P & Porod, W 2012, Systolic architectures and applications for nanomagnet logic. in 2012 IEEE Silicon Nanoelectronics Workshop, SNW 2012., 6243329, 2012 IEEE Silicon Nanoelectronics Workshop, SNW 2012, 2012 17th IEEE Silicon Nanoelectronics Workshop, SNW 2012, Honolulu, HI, United States, 10/06/12. https://doi.org/10.1109/SNW.2012.6243329

TY - GEN

T1 - Systolic architectures and applications for nanomagnet logic

AU - Niemier, M.

AU - Ju, X.

AU - Becherer, M.

AU - Csaba, G.

AU - Hu, X. S.

AU - Schmitt-Landsiedel, D.

AU - Lugli, P.

AU - Porod, W.

PY - 2012

Y1 - 2012

N2 - Most NML research has studied small magnet ensembles for interconnect or isolated gates. We discuss how NML might be used to process information, as well as suitable system architecture-to-device architecture mappings. A case study for pattern matching hardware is presented.

AB - Most NML research has studied small magnet ensembles for interconnect or isolated gates. We discuss how NML might be used to process information, as well as suitable system architecture-to-device architecture mappings. A case study for pattern matching hardware is presented.

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U2 - 10.1109/SNW.2012.6243329

DO - 10.1109/SNW.2012.6243329

M3 - Conference contribution

AN - SCOPUS:84867222027

SN - 9781467309943

T3 - 2012 IEEE Silicon Nanoelectronics Workshop, SNW 2012

BT - 2012 IEEE Silicon Nanoelectronics Workshop, SNW 2012

T2 - 2012 17th IEEE Silicon Nanoelectronics Workshop, SNW 2012

Y2 - 10 June 2012 through 11 June 2012

ER -

Systolic architectures and applications for nanomagnet logic

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