@inproceedings{35661514e240412eb73d15c5a71948c4,
title = "SystemC as completing pillar in industrial OVM based verification environments",
abstract = "This paper presents a novel TLM verification approach utilizing TLM+ as a reference model and providing a systematic path to RTL simulation as well. The approach is based on SystemC only but follows the established structure on an OVM testbench. Industrial relevant aspects as use of standards, early verification, and re-use of design items are established in this way.",
keywords = "SystemC, Testbenches, Verification",
author = "Wolfgang Ecker and Volkan Esen and Michael Velten and Tudor Timisescu",
year = "2012",
doi = "10.1145/2380445.2380496",
language = "English",
isbn = "9781450314268",
series = "CODES+ISSS'12 - Proceedings of the 10th ACM International Conference on Hardware/Software-Codesign and System Synthesis, Co-located with ESWEEK",
pages = "307--311",
booktitle = "CODES+ISSS'12 - Proceedings of the 10th ACM International Conference on Hardware/Software-Codesign and System Synthesis, Co-located with ESWEEK",
note = "10th ACM International Conference on Hardware/Software-Codesign and System Synthesis, CODES+ISSS 2012, Co-located with 8th Embedded Systems Week, ESWEEK 2012 ; Conference date: 07-10-2012 Through 12-10-2012",
}