@inproceedings{d0f335cb42f849e3a8646c622fc712e4,
title = "Synthesis of reversible circuits using conventional hardware description languages",
abstract = "Hardware Description Languages (HDL) facilitate the design of complex circuits and allow for scalable synthesis. While rather established for conventional circuits, HDL-based design of reversible circuits is in its infancy. This motivates the question whether conventional HDLs can also be efficiently used for the design of reversible circuits. This work investigates this question and provides a basis towards a design flow that requires only little knowledge of reversible computation. This eases the acceptance of this non-conventional paradigm amongst designers and stakeholders.",
keywords = "Hardware Description Languages, Reversible Circuits, Synthesis",
author = "Zaid Alwardi and Robert Wille and Rolf Drechsler",
note = "Publisher Copyright: {\textcopyright} 2018 IEEE.; 48th IEEE International Symposium on Multiple-Valued Logic, ISMVL 2018 ; Conference date: 16-05-2018 Through 18-05-2018",
year = "2018",
month = jul,
day = "19",
doi = "10.1109/ISMVL.2018.00025",
language = "English",
series = "Proceedings of The International Symposium on Multiple-Valued Logic",
publisher = "IEEE Computer Society",
pages = "97--102",
booktitle = "Proceedings - 2018 IEEE 48th International Symposium on Multiple-Valued Logic, ISMVL 2018",
}