Synthesis of reversible circuits using conventional hardware description languages

Zaid Alwardi, Robert Wille, Rolf Drechsler

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

5 Scopus citations

Abstract

Hardware Description Languages (HDL) facilitate the design of complex circuits and allow for scalable synthesis. While rather established for conventional circuits, HDL-based design of reversible circuits is in its infancy. This motivates the question whether conventional HDLs can also be efficiently used for the design of reversible circuits. This work investigates this question and provides a basis towards a design flow that requires only little knowledge of reversible computation. This eases the acceptance of this non-conventional paradigm amongst designers and stakeholders.

Original languageEnglish
Title of host publicationProceedings - 2018 IEEE 48th International Symposium on Multiple-Valued Logic, ISMVL 2018
PublisherIEEE Computer Society
Pages97-102
Number of pages6
ISBN (Electronic)9781538644638
DOIs
StatePublished - 19 Jul 2018
Externally publishedYes
Event48th IEEE International Symposium on Multiple-Valued Logic, ISMVL 2018 - Linz, Austria
Duration: 16 May 201818 May 2018

Publication series

NameProceedings of The International Symposium on Multiple-Valued Logic
Volume2018-May
ISSN (Print)0195-623X

Conference

Conference48th IEEE International Symposium on Multiple-Valued Logic, ISMVL 2018
Country/TerritoryAustria
CityLinz
Period16/05/1818/05/18

Keywords

  • Hardware Description Languages
  • Reversible Circuits
  • Synthesis

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