Structured Design and Evaluation of a Resistor-Based PUF Robust Against PVT-Variations

Carl Riehm, Christoph Frisch, Florin Burcea, Matthias Hiller, Michael Pehl, Ralf Brederlow

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

1 Scopus citations

Abstract

This paper proposes a new fully CMOS-compatible PUF primitive robust against process variations, supply voltage variations and temperature drift (PVT) based on resistive structures that implements advanced compensation mechanisms already on circuit level. Based on analog simulation data, the PUF is evaluated regarding its unpredictability and its reliability. The results indicate a high quality. Further, a structured approach for designing a suitable error correction is presented to illustrate the whole PUF system.

Original languageEnglish
Title of host publicationProceedings - 2023 26th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2023
EditorsMaksim Jenihhin, Hana Kubatova, Nele Metens, Nele Metens, Jaan Raik, Foisal Ahmed, Jan Belohoubek
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages93-98
Number of pages6
ISBN (Electronic)9798350332773
DOIs
StatePublished - 2023
Event26th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2023 - Tallin, Estonia
Duration: 3 May 20235 May 2023

Publication series

NameProceedings - 2023 26th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2023

Conference

Conference26th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2023
Country/TerritoryEstonia
CityTallin
Period3/05/235/05/23

Keywords

  • Silicon PUF
  • error orrection
  • mixed signal

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