Space vector PWM method for three-level voltage source inverters

P. F. Seixas, M. A.Severo Mendes, P. Donoso-Garcia, A. M.N. Lima

Research output: Contribution to conferencePaperpeer-review

59 Scopus citations

Abstract

In this paper, a space vector PWM method for three-level inverters is presented. In the proposed technique, boundary restrictions can be easily incorporated to minimize the harmonic distortion output voltages, to limit the minimum pulse width and to balance the voltages of the dc-link capacitor bank. The solutions obtained are simple algebraic equations relating directly the pulse widths of the gate signals to the phase reference voltages. Computer simulation results are used to demonstrate the main features of the proposed technique.

Original languageEnglish
Pages549-555
Number of pages7
StatePublished - 2000
Externally publishedYes
EventThe 15th Annual IEEE Applied Power Electronics Conference and Exposition - APEC 2000 - New Orleans, LA, USA
Duration: 6 Feb 200010 Feb 2000

Conference

ConferenceThe 15th Annual IEEE Applied Power Electronics Conference and Exposition - APEC 2000
CityNew Orleans, LA, USA
Period6/02/0010/02/00

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