@inproceedings{0c41df6e98ad40c8a13d1fc25eb09459,
title = "Soft-Error Analysis of RRAM 1T1R Compute-In-Memory Core for Artificial Neural Networks",
abstract = "This work analyses SEU-induced soft-errors in analog compute-in-memory cores using resistive random-Access memory (RRAM) for artificial neural networks, where their bitcells utilize one-Transistor-one-RRAM (1T1R) structure. This is modeled by combining the Stanford-PKU RRAM Model and the model of the radiation-induced photocurrent in access transistors. As results, this work derives the maximal RRAM crossbar size without occurring any logic flip and indicates the requirements for RRAM technology to achieve a SEU-resilient 1T1R compute-in memory cores.",
keywords = "Compute-In-Memory, IT1R, MAC, Modeling, Radiation Hardening, RHBD, RRAM, Single Effect Upsets",
author = "Ruolan Jia and Stefan Pechmann and Fritscher Markus and Christian Wenger and Lei Zhang and Amelie Hagelauer",
note = "Publisher Copyright: {\textcopyright} 2024 IEEE.; 39th Conference on Design of Circuits and Integrated Systems, DCIS 2024 ; Conference date: 13-11-2024 Through 15-11-2024",
year = "2024",
doi = "10.1109/DCIS62603.2024.10769203",
language = "English",
series = "2024 39th Conference on Design of Circuits and Integrated Systems, DCIS 2024",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
booktitle = "2024 39th Conference on Design of Circuits and Integrated Systems, DCIS 2024",
}