Side channel attack on NoC-based MPSoCs are practical: NoC Prime+Probe attack

Cezar Reinbrecht; Altamiro Susin; Lilian Bossuet; Georg Sigl; Johanna Sepulveda

doi:10.1109/SBCCI.2016.7724051

Side channel attack on NoC-based MPSoCs are practical: NoC Prime+Probe attack

Cezar Reinbrecht
, Altamiro Susin
, Lilian Bossuet
, Georg Sigl
, Johanna Sepulveda

Chair of Security in Information Technology

UFRGS
Univ. of Lyon
Technical University of Munich

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

36 Scopus citations

Abstract

Many authors have shown how to break the AES cryptographic algorithm with side channel attacks, specially the timing attacks oriented to caches, like Prime+Probe. In this paper, we present a practical timing attack on NoC that improves Prime+Probe technique. Our attack targets the communication between an ARM Cortex-A9 core and a shared cache memory. Furthermore, we evaluate a secure enhanced NoC applied as a countermeasure of the timing attack. Finally, we demonstrate that attacks on MPSoCs through the NoC are a real threat and need to be further explored.

Original language	English
Title of host publication	Proceedings - SBCCI 2016
Subtitle of host publication	29th Symposium on Integrated Circuits and Systems Design: Chip on the Mountains
Publisher	Institute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)	9781509027361
DOIs	https://doi.org/10.1109/SBCCI.2016.7724051
State	Published - 27 Oct 2016
Event	29th Symposium on Integrated Circuits and Systems Design, SBCCI 2016 - Belo Horizonte, Minas Gerais, Brazil Duration: 29 Aug 2016 → 3 Sep 2016

Publication series

Name	Proceedings - SBCCI 2016: 29th Symposium on Integrated Circuits and Systems Design: Chip on the Mountains

Conference

Conference	29th Symposium on Integrated Circuits and Systems Design, SBCCI 2016
Country/Territory	Brazil
City	Belo Horizonte, Minas Gerais
Period	29/08/16 → 3/09/16

Keywords

Network-on-Chip
Security NoC
Timing Attack
Timing Side-channel Attack

Access to Document

10.1109/SBCCI.2016.7724051

Cite this

Reinbrecht, C., Susin, A., Bossuet, L., Sigl, G., & Sepulveda, J. (2016). Side channel attack on NoC-based MPSoCs are practical: NoC Prime+Probe attack. In Proceedings - SBCCI 2016: 29th Symposium on Integrated Circuits and Systems Design: Chip on the Mountains Article 7724051 (Proceedings - SBCCI 2016: 29th Symposium on Integrated Circuits and Systems Design: Chip on the Mountains). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/SBCCI.2016.7724051

Reinbrecht, Cezar ; Susin, Altamiro ; Bossuet, Lilian et al. / Side channel attack on NoC-based MPSoCs are practical : NoC Prime+Probe attack. Proceedings - SBCCI 2016: 29th Symposium on Integrated Circuits and Systems Design: Chip on the Mountains. Institute of Electrical and Electronics Engineers Inc., 2016. (Proceedings - SBCCI 2016: 29th Symposium on Integrated Circuits and Systems Design: Chip on the Mountains).

@inproceedings{690cd5b811074a61a394ecf18c022b77,

title = "Side channel attack on NoC-based MPSoCs are practical: NoC Prime+Probe attack",

abstract = "Many authors have shown how to break the AES cryptographic algorithm with side channel attacks, specially the timing attacks oriented to caches, like Prime+Probe. In this paper, we present a practical timing attack on NoC that improves Prime+Probe technique. Our attack targets the communication between an ARM Cortex-A9 core and a shared cache memory. Furthermore, we evaluate a secure enhanced NoC applied as a countermeasure of the timing attack. Finally, we demonstrate that attacks on MPSoCs through the NoC are a real threat and need to be further explored.",

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author = "Cezar Reinbrecht and Altamiro Susin and Lilian Bossuet and Georg Sigl and Johanna Sepulveda",

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Reinbrecht, C, Susin, A, Bossuet, L, Sigl, G & Sepulveda, J 2016, Side channel attack on NoC-based MPSoCs are practical: NoC Prime+Probe attack. in Proceedings - SBCCI 2016: 29th Symposium on Integrated Circuits and Systems Design: Chip on the Mountains., 7724051, Proceedings - SBCCI 2016: 29th Symposium on Integrated Circuits and Systems Design: Chip on the Mountains, Institute of Electrical and Electronics Engineers Inc., 29th Symposium on Integrated Circuits and Systems Design, SBCCI 2016, Belo Horizonte, Minas Gerais, Brazil, 29/08/16. https://doi.org/10.1109/SBCCI.2016.7724051

Side channel attack on NoC-based MPSoCs are practical: NoC Prime+Probe attack. / Reinbrecht, Cezar; Susin, Altamiro; Bossuet, Lilian et al.
Proceedings - SBCCI 2016: 29th Symposium on Integrated Circuits and Systems Design: Chip on the Mountains. Institute of Electrical and Electronics Engineers Inc., 2016. 7724051 (Proceedings - SBCCI 2016: 29th Symposium on Integrated Circuits and Systems Design: Chip on the Mountains).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - Side channel attack on NoC-based MPSoCs are practical

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AU - Reinbrecht, Cezar

AU - Susin, Altamiro

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AU - Sigl, Georg

AU - Sepulveda, Johanna

PY - 2016/10/27

Y1 - 2016/10/27

N2 - Many authors have shown how to break the AES cryptographic algorithm with side channel attacks, specially the timing attacks oriented to caches, like Prime+Probe. In this paper, we present a practical timing attack on NoC that improves Prime+Probe technique. Our attack targets the communication between an ARM Cortex-A9 core and a shared cache memory. Furthermore, we evaluate a secure enhanced NoC applied as a countermeasure of the timing attack. Finally, we demonstrate that attacks on MPSoCs through the NoC are a real threat and need to be further explored.

AB - Many authors have shown how to break the AES cryptographic algorithm with side channel attacks, specially the timing attacks oriented to caches, like Prime+Probe. In this paper, we present a practical timing attack on NoC that improves Prime+Probe technique. Our attack targets the communication between an ARM Cortex-A9 core and a shared cache memory. Furthermore, we evaluate a secure enhanced NoC applied as a countermeasure of the timing attack. Finally, we demonstrate that attacks on MPSoCs through the NoC are a real threat and need to be further explored.

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KW - Security NoC

KW - Timing Attack

KW - Timing Side-channel Attack

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ER -

Reinbrecht C, Susin A, Bossuet L, Sigl G, Sepulveda J. Side channel attack on NoC-based MPSoCs are practical: NoC Prime+Probe attack. In Proceedings - SBCCI 2016: 29th Symposium on Integrated Circuits and Systems Design: Chip on the Mountains. Institute of Electrical and Electronics Engineers Inc. 2016. 7724051. (Proceedings - SBCCI 2016: 29th Symposium on Integrated Circuits and Systems Design: Chip on the Mountains). doi: 10.1109/SBCCI.2016.7724051

Side channel attack on NoC-based MPSoCs are practical: NoC Prime+Probe attack

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