Self-Heating Effects from Transistors to Gates

Victor M. Van Santen, Linda Schillinger, Hussam Amrouch

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

6 Scopus citations

Abstract

With the introduction of FinFET transistors, the Self-Heating Effect (SHE) became a major reliability challenge. In this work, we present an automated SHE estimation method integrated within a circuit reliability framework. It allows designers to study SHE in analogue and digital circuits. For accurate analysis, we employ electrically and thermally calibrated 14nm FinFET transistor models. To demonstrate the capabilities of our framework, we study SHE in standard cells and report a considerable dependence on the cell topology. We show how SHE can induce 15% delay increase in AND3 logic gate, highlighting the importance of taking SHE into account. Otherwise, reliability cannot be sustained during the circuit's operation.

Original languageEnglish
Title of host publication2021 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2021 - Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781665419154
DOIs
StatePublished - 19 Apr 2021
Externally publishedYes
Event2021 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2021 - Hsinchu, Taiwan, Province of China
Duration: 19 Apr 202122 Apr 2021

Publication series

Name2021 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2021 - Proceedings

Conference

Conference2021 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2021
Country/TerritoryTaiwan, Province of China
CityHsinchu
Period19/04/2122/04/21

Keywords

  • Circuits
  • FinFET
  • Reliability
  • Self-Heating

Fingerprint

Dive into the research topics of 'Self-Heating Effects from Transistors to Gates'. Together they form a unique fingerprint.

Cite this