Reliable Brain-inspired AI Accelerators using Classical and Emerging Memories

Mikail Yayla, Simon Thomann, Md Mazharul Islam, Ming Liang Wei, Shu Yin Ho, Ahmedullah Aziz, Chia Lin Yang, Jian Jia Chen, Hussam Amrouch

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

By taking inspiration from the operation of biological brains, emerging brain-inspired hardware has the potential to revolutionize the way computations are performed. Brain-inspired computing can be realized using both classical CMOS and emerging beyond-CMOS technologies, whereas the latter holds the promise to provide substantial energy savings akin to the employment of non-volatile memories. One way to implement highly efficient brain-inspired AI applications is through analog computing schemes, such as Integrate-and-Fire (IF) Spiking Neural Networks (SNNs), which can be implemented using both CMOS and beyond-CMOS technologies as synaptic storage. However, managing the inherent degradation of computing accuracy in analog circuits and mitigating their effects on the predictive accuracy of AI systems remains a key challenge due to the inherent nature of analog computing.In this paper, we discuss how the aforementioned challenges can be addressed. In the first part, we present our SPICE-Torch, a framework that connects low-level SPICE simulations of circuits and memories performing analog computations with high-level accuracy evaluations of NN models based on PyTorch. Furthermore, we present an example of neuromorphic optimization using classical CMOS technology. In the second part, we introduce memristors as an emerging beyond-CMOS technology that can retain their state without any outside influence and are well-suited for brain-inspired neuromorphic hardware. We demonstrate that brain-inspired hardware, realized using classical CMOS or beyond-CMOS technologies, has the potential to revolutionize the way we process information and solve complex computation problems. Nevertheless, to harness its full potential, reliability issues have to be managed carefully and HW/SW codesign is key. Our presented framework SPICE-Torch, which connects low-level SPICE simulations of circuits performing analog computations with high-level accuracy evaluations of NN models based on PyTorch is available as open-source in https://github.com/myay/SPICE-Torch.

Original languageEnglish
Title of host publicationProceedings - 2023 IEEE 41st VLSI Test Symposium, VTS 2023
PublisherIEEE Computer Society
ISBN (Electronic)9798350346305
DOIs
StatePublished - 2023
Externally publishedYes
Event41st IEEE VLSI Test Symposium, VTS 2023 - San Diego, United States
Duration: 24 Apr 202326 Apr 2023

Publication series

NameProceedings of the IEEE VLSI Test Symposium
Volume2023-April

Conference

Conference41st IEEE VLSI Test Symposium, VTS 2023
Country/TerritoryUnited States
CitySan Diego
Period24/04/2326/04/23

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