TY - GEN
T1 - Reducing the depth of quantum circuits using additional circuit lines
AU - Abdessaied, Nabila
AU - Wille, Robert
AU - Soeken, Mathias
AU - Drechsler, Rolf
PY - 2013
Y1 - 2013
N2 - The synthesis of Boolean functions, as they are found in many quantum algorithms, is usually conducted in two steps. First, the function is realized in terms of a reversible circuit followed by a mapping into a corresponding quantum realization. During this process, the number of lines and the quantum costs of the resulting circuits have mainly been considered as optimization objectives thus far. However, beyond that also the depth of a quantum circuit is vital. Although first synthesis approaches that consider depth have recently been introduced, the majority of design methods did not consider this metric. In this paper, we introduce an optimization approach aiming for the reduction of depth in the process of mapping a reversible circuit into a quantum circuit. For this purpose, we present an improved (local) mapping of single gates as well as a (global) optimization scheme considering the whole circuit. In both cases, we incorporate the idea of exploiting additional circuit lines which are used in order to split a chain of serial gates. Our optimization techniques enable a concurrent application of gates which significantly reduces the depth of the circuit. Experiments show that reductions of approx. 40% on average can be achieved when following this scheme.
AB - The synthesis of Boolean functions, as they are found in many quantum algorithms, is usually conducted in two steps. First, the function is realized in terms of a reversible circuit followed by a mapping into a corresponding quantum realization. During this process, the number of lines and the quantum costs of the resulting circuits have mainly been considered as optimization objectives thus far. However, beyond that also the depth of a quantum circuit is vital. Although first synthesis approaches that consider depth have recently been introduced, the majority of design methods did not consider this metric. In this paper, we introduce an optimization approach aiming for the reduction of depth in the process of mapping a reversible circuit into a quantum circuit. For this purpose, we present an improved (local) mapping of single gates as well as a (global) optimization scheme considering the whole circuit. In both cases, we incorporate the idea of exploiting additional circuit lines which are used in order to split a chain of serial gates. Our optimization techniques enable a concurrent application of gates which significantly reduces the depth of the circuit. Experiments show that reductions of approx. 40% on average can be achieved when following this scheme.
UR - http://www.scopus.com/inward/record.url?scp=84880704971&partnerID=8YFLogxK
U2 - 10.1007/978-3-642-38986-3_18
DO - 10.1007/978-3-642-38986-3_18
M3 - Conference contribution
AN - SCOPUS:84880704971
SN - 9783642389856
T3 - Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
SP - 221
EP - 233
BT - Reversible Computation - 5th International Conference, RC 2013, Proceedings
PB - Springer Verlag
T2 - 5th International Conference on Reversible Computation, RC 2013
Y2 - 4 July 2013 through 5 July 2013
ER -