TY - GEN
T1 - Reducing reversible circuit cost by adding lines
AU - Miller, D. Michael
AU - Wille, Robert
AU - Drechsler, Rolf
PY - 2010
Y1 - 2010
N2 - Additional lines are required to implement an irreversible function as a reversible circuit. The emphasis, particularly in automated synthesis methods, has been on using the minimal number of additional lines. In this paper, we show that circuit cost reductions can be achieved by adding additional lines. We present an algorithm for line addition that can be targeted to reducing the quantum cost of a circuit or the transistor count for a CMOS implementation. Experimental results show that the cost reduction can be significant even if (1) only a small number of lines (even one) is added and (2) other circuit optimizations have already been applied.
AB - Additional lines are required to implement an irreversible function as a reversible circuit. The emphasis, particularly in automated synthesis methods, has been on using the minimal number of additional lines. In this paper, we show that circuit cost reductions can be achieved by adding additional lines. We present an algorithm for line addition that can be targeted to reducing the quantum cost of a circuit or the transistor count for a CMOS implementation. Experimental results show that the cost reduction can be significant even if (1) only a small number of lines (even one) is added and (2) other circuit optimizations have already been applied.
UR - https://www.scopus.com/pages/publications/77955314326
U2 - 10.1109/ISMVL.2010.48
DO - 10.1109/ISMVL.2010.48
M3 - Conference contribution
AN - SCOPUS:77955314326
SN - 9780769540245
T3 - Proceedings of The International Symposium on Multiple-Valued Logic
SP - 217
EP - 222
BT - ISMVL 2010 - 40th IEEE International Symposium on Multiple-Valued Logic
T2 - 40th IEEE International Symposium on Multiple-Valued Logic, ISMVL 2010
Y2 - 26 May 2010 through 28 May 2010
ER -