Reducing losses in three-phase PWM pulsed dc-link voltage-type inverter systems

Marcelo Cabral Cavalcanti; Edison Roberto Cabrai Da Silva; Antonio Marcus Nogueira Lima; Cursino Brandão Jacobina; Raimundo Nazareno Cunha Alves

doi:10.1109/TIA.2002.800579

Reducing losses in three-phase PWM pulsed dc-link voltage-type inverter systems

Marcelo Cabral Cavalcanti
, Edison Roberto Cabrai Da Silva
, Antonio Marcus Nogueira Lima
, Cursino Brandão Jacobina
, Raimundo Nazareno Cunha Alves

IEEE
Virginia Polytechnic Institute and State University
UFPB
Federal University of Pará

Research output: Contribution to journal › Article › peer-review

25 Scopus citations

Abstract

This paper deals with pulsewidth modulation (PWM) strategies that synchronize clamped voltage segments using the current peak in the corresponding phases of a three-phase quasi-resonant dc-link (QRDCL) voltage inverter. It is shown that, instead of employing lookup tables, these strategies can be easily implemented by using the concept of hybrid modulation in this type of pulsed dc-link voltage (PDCLV) inverter. In fact, such concept leads to a systematic and straight approach to the generation of any continuous or discontinuous PWM strategy. A topology that is shown to produce fewer losses than either PDCLV inverters or the hard-switched inverter version is used to compare the losses produced when the two strategies discussed in the paper are employed. Simulation and experimental results confirm the validity of the proposed technique.

Original language	English
Pages (from-to)	1114-1122
Number of pages	9
Journal	IEEE Transactions on Industry Applications
Volume	38
Issue number	4
DOIs	https://doi.org/10.1109/TIA.2002.800579
State	Published - Jul 2002
Externally published	Yes

Keywords

Losses
Soft switch
Three-phase inverter

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10.1109/TIA.2002.800579

Cite this

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title = "Reducing losses in three-phase PWM pulsed dc-link voltage-type inverter systems",

abstract = "This paper deals with pulsewidth modulation (PWM) strategies that synchronize clamped voltage segments using the current peak in the corresponding phases of a three-phase quasi-resonant dc-link (QRDCL) voltage inverter. It is shown that, instead of employing lookup tables, these strategies can be easily implemented by using the concept of hybrid modulation in this type of pulsed dc-link voltage (PDCLV) inverter. In fact, such concept leads to a systematic and straight approach to the generation of any continuous or discontinuous PWM strategy. A topology that is shown to produce fewer losses than either PDCLV inverters or the hard-switched inverter version is used to compare the losses produced when the two strategies discussed in the paper are employed. Simulation and experimental results confirm the validity of the proposed technique.",

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author = "Cavalcanti, \{Marcelo Cabral\} and \{Da Silva\}, \{Edison Roberto Cabrai\} and Lima, \{Antonio Marcus Nogueira\} and Jacobina, \{Cursino Brand{\~a}o\} and Alves, \{Raimundo Nazareno Cunha\}",

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T1 - Reducing losses in three-phase PWM pulsed dc-link voltage-type inverter systems

AU - Cavalcanti, Marcelo Cabral

AU - Da Silva, Edison Roberto Cabrai

AU - Lima, Antonio Marcus Nogueira

AU - Jacobina, Cursino Brandão

AU - Alves, Raimundo Nazareno Cunha

PY - 2002/7

Y1 - 2002/7

N2 - This paper deals with pulsewidth modulation (PWM) strategies that synchronize clamped voltage segments using the current peak in the corresponding phases of a three-phase quasi-resonant dc-link (QRDCL) voltage inverter. It is shown that, instead of employing lookup tables, these strategies can be easily implemented by using the concept of hybrid modulation in this type of pulsed dc-link voltage (PDCLV) inverter. In fact, such concept leads to a systematic and straight approach to the generation of any continuous or discontinuous PWM strategy. A topology that is shown to produce fewer losses than either PDCLV inverters or the hard-switched inverter version is used to compare the losses produced when the two strategies discussed in the paper are employed. Simulation and experimental results confirm the validity of the proposed technique.

AB - This paper deals with pulsewidth modulation (PWM) strategies that synchronize clamped voltage segments using the current peak in the corresponding phases of a three-phase quasi-resonant dc-link (QRDCL) voltage inverter. It is shown that, instead of employing lookup tables, these strategies can be easily implemented by using the concept of hybrid modulation in this type of pulsed dc-link voltage (PDCLV) inverter. In fact, such concept leads to a systematic and straight approach to the generation of any continuous or discontinuous PWM strategy. A topology that is shown to produce fewer losses than either PDCLV inverters or the hard-switched inverter version is used to compare the losses produced when the two strategies discussed in the paper are employed. Simulation and experimental results confirm the validity of the proposed technique.

KW - Losses

KW - Soft switch

KW - Three-phase inverter

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DO - 10.1109/TIA.2002.800579

M3 - Article

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Reducing losses in three-phase PWM pulsed dc-link voltage-type inverter systems

Abstract

Keywords

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