Real-Time Computing on Multicore Processors

Lui Sha; Marco Caccamo; Renato Mancuso; Jung Eun Kim; Man Ki Yoon; Rodolfo Pellizzoni; Heechul Yun; Russell B. Kegley; Dennis R. Perlman; Greg Arundale; Richard Bradford

doi:10.1109/MC.2016.271

Real-Time Computing on Multicore Processors

Lui Sha, Marco Caccamo, Renato Mancuso, Jung Eun Kim, Man Ki Yoon, Rodolfo Pellizzoni, Heechul Yun, Russell B. Kegley, Dennis R. Perlman, Greg Arundale, Richard Bradford

Research output: Contribution to specialist publication › Article

17 Scopus citations

Abstract

Architects of multicore chips for avionics must define and bound intercore interference, which requires assuming a constant worst-case execution time for tasks executing on the chip. With the Single Core Equivalent technology package, engineers can treat each core as if it were a single-core chip.

Original language	English
Pages	69-77
Number of pages	9
Volume	49
No	9
Specialist publication	Computer
DOIs	https://doi.org/10.1109/MC.2016.271
State	Published - Sep 2016
Externally published	Yes

Keywords

avionics computing
memory-access conflicts
multicore architecture
multicore chips
multicore processing
real-time systems
single-core equivalence

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10.1109/MC.2016.271

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@misc{7f49123340bc4599811e65b5d5594988,

title = "Real-Time Computing on Multicore Processors",

abstract = "Architects of multicore chips for avionics must define and bound intercore interference, which requires assuming a constant worst-case execution time for tasks executing on the chip. With the Single Core Equivalent technology package, engineers can treat each core as if it were a single-core chip.",

keywords = "avionics computing, memory-access conflicts, multicore architecture, multicore chips, multicore processing, real-time systems, single-core equivalence",

author = "Lui Sha and Marco Caccamo and Renato Mancuso and Kim, {Jung Eun} and Yoon, {Man Ki} and Rodolfo Pellizzoni and Heechul Yun and Kegley, {Russell B.} and Perlman, {Dennis R.} and Greg Arundale and Richard Bradford",

note = "Publisher Copyright: {\textcopyright} 2016 IEEE.",

year = "2016",

month = sep,

doi = "10.1109/MC.2016.271",

language = "English",

volume = "49",

pages = "69--77",

journal = "Computer",

issn = "0018-9162",

publisher = "IEEE Computer Society",

}

TY - GEN

T1 - Real-Time Computing on Multicore Processors

AU - Sha, Lui

AU - Caccamo, Marco

AU - Mancuso, Renato

AU - Kim, Jung Eun

AU - Yoon, Man Ki

AU - Pellizzoni, Rodolfo

AU - Yun, Heechul

AU - Kegley, Russell B.

AU - Perlman, Dennis R.

AU - Arundale, Greg

AU - Bradford, Richard

PY - 2016/9

Y1 - 2016/9

N2 - Architects of multicore chips for avionics must define and bound intercore interference, which requires assuming a constant worst-case execution time for tasks executing on the chip. With the Single Core Equivalent technology package, engineers can treat each core as if it were a single-core chip.

AB - Architects of multicore chips for avionics must define and bound intercore interference, which requires assuming a constant worst-case execution time for tasks executing on the chip. With the Single Core Equivalent technology package, engineers can treat each core as if it were a single-core chip.

KW - avionics computing

KW - memory-access conflicts

KW - multicore architecture

KW - multicore chips

KW - multicore processing

KW - real-time systems

KW - single-core equivalence

UR - http://www.scopus.com/inward/record.url?scp=84987624705&partnerID=8YFLogxK

U2 - 10.1109/MC.2016.271

DO - 10.1109/MC.2016.271

M3 - Article

AN - SCOPUS:84987624705

SN - 0018-9162

VL - 49

SP - 69

EP - 77

JO - Computer

JF - Computer

ER -

Real-Time Computing on Multicore Processors

Abstract

Keywords

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