Rate analysis for streaming applications with on-chip buffer constraints

Alexander Maxiaguine, Simon Künzli, Samarjit Chakraborty, Lothar Thiele

Research output: Contribution to conferencePaperpeer-review

35 Scopus citations

Abstract

While mapping a streaming (such as multimedia or network packet processing) application onto a specified architecture, an important issue is to determine the input stream rates that can be supported by the architecture for any given mapping. This is subject to typical constraints such as on-chip buffers should not overflow, and specified play out buffers (which feed audio or video devices) should not underflow, so that the quality of the audio/video output is maintained. The main difficulty in this problem arises from the high variability in execution times of stream processing algorithms, coupled with the bursty nature of the streams to be processed. In this paper we present a mathematical framework for such a rate analysis for streaming applications, and illustrate its feasibility through a detailed case study of a MPEG-2 decoder application. When integrated into a tool for automated design-space exploration, such an analysis can be used for fast performance evaluation of different stream processing architectures.

Original languageEnglish
Pages131-136
Number of pages6
StatePublished - 2004
Externally publishedYes
EventProceedings of the ASP - DAC 2004 Asia and South Pacific Design Automation Conference - 2004 - Yokohama, Japan
Duration: 27 Jan 200430 Jan 2004

Conference

ConferenceProceedings of the ASP - DAC 2004 Asia and South Pacific Design Automation Conference - 2004
Country/TerritoryJapan
CityYokohama
Period27/01/0430/01/04

Fingerprint

Dive into the research topics of 'Rate analysis for streaming applications with on-chip buffer constraints'. Together they form a unique fingerprint.

Cite this