TY - GEN
T1 - QoS-Aware Dynamic Frequency Scaling for Mixed-Critical Systems based on Shielded Reinforcement Learning
AU - Maurer, Florian
AU - Meidinger, Michael
AU - Lu, Yiming
AU - Hallermeier, Thomas
AU - Surhonne, Anmol
AU - Wild, Thomas
AU - Herkersdorf, Andreas
N1 - Publisher Copyright:
© 2024 IEEE.
PY - 2024
Y1 - 2024
N2 - In recent years, several approaches have proposed dynamic voltage-frequency scaling (DVFS) controllers for power management in multiprocessor system-on-chips based on reinforcement learning (RL) to cope with changing system dynamics. Those implemented in software cannot respond to short-term changes in processor load, which occur at a sub-millisecond scale. On the other hand, modern processors contain various built-in hardware features, like prefetchers, reacting to short-term variations to improve system performance. Previously, we integrated such an RL-based DVFS algorithm into the hardware and applied it to optimize the performance of best-effort tasks. In this work, we augment it with preemptive shielding and eligibility traces to employ it on deadline-bound quality of service (QoS) tasks. The algorithm takes advantage of short-term variations to minimize power usage while ensuring the application's QoS. Additionally, our algorithm complies with the power constraints necessary in mixed-critical systems unlike state-of-the-art algorithms. We demonstrate the features of our algorithm in a hardware-in-the-loop simulation by running LLVM's single-source benchmarks on SparcV8 processors.
AB - In recent years, several approaches have proposed dynamic voltage-frequency scaling (DVFS) controllers for power management in multiprocessor system-on-chips based on reinforcement learning (RL) to cope with changing system dynamics. Those implemented in software cannot respond to short-term changes in processor load, which occur at a sub-millisecond scale. On the other hand, modern processors contain various built-in hardware features, like prefetchers, reacting to short-term variations to improve system performance. Previously, we integrated such an RL-based DVFS algorithm into the hardware and applied it to optimize the performance of best-effort tasks. In this work, we augment it with preemptive shielding and eligibility traces to employ it on deadline-bound quality of service (QoS) tasks. The algorithm takes advantage of short-term variations to minimize power usage while ensuring the application's QoS. Additionally, our algorithm complies with the power constraints necessary in mixed-critical systems unlike state-of-the-art algorithms. We demonstrate the features of our algorithm in a hardware-in-the-loop simulation by running LLVM's single-source benchmarks on SparcV8 processors.
KW - DFS
KW - FPGA
KW - Hardware
KW - MPSoC runtime management
KW - Optimization
KW - Reinforcement learning
KW - Self-awareness
UR - http://www.scopus.com/inward/record.url?scp=85211951991&partnerID=8YFLogxK
U2 - 10.1109/NorCAS64408.2024.10752457
DO - 10.1109/NorCAS64408.2024.10752457
M3 - Conference contribution
AN - SCOPUS:85211951991
T3 - 2024 IEEE Nordic Circuits and Systems Conference, NORCAS 2024 - Proceedings
BT - 2024 IEEE Nordic Circuits and Systems Conference, NORCAS 2024 - Proceedings
A2 - Nurmi, Jari
A2 - Rodrigues, Joachim
A2 - Pezzarossa, Luca
A2 - Aberg, Viktor
A2 - Behmanesh, Baktash
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 10th IEEE Nordic Circuits and Systems Conference, NORCAS 2024
Y2 - 29 October 2024 through 30 October 2024
ER -