Power-clock-gating in adiabatischen logikschaltungen

Engineering

• Power Supply 100%
• Design Rule 100%
• Dynamic Loss 100%
• Clock Signal 100%
• Leakage Loss 100%
• Oscillator 100%

Keyphrases

• Clock Gating 100%
• Clock Power 100%
• Adiabatic Logic 40%
• Power Gating 40%
• Switching Topology 40%
• Power Supply 20%
• CMOS Circuits 20%
• Static CMOS 20%
• Design Rules 20%
• Dissipated Energy 20%
• Clock Signal 20%
• One Switch 20%
• Leakage Loss 20%
• On-state 20%
• Dynamic Losses 20%