@inproceedings{68bda663beea41f59fc4de052ae5de64,
title = "PLATON: A force-directed placement algorithm for 3D Optical Networks-on-Chip",
abstract = "Optical Networks-on-Chip (ONoCs) are a promising technology to further increase the bandwidth and decrease the power consumption of today's multicore systems. To determine the laser power consumption of an ONoC, the physical design of the system is indispensible. The only place and route tool for 3D ONoCs already proposed in the literature badly scales with the increasing number of optical devices. Thus, within this contribution we present the first force-directed placement algorithm for 3D optical NoCs. Our algorithm decreases the runtime up to 99.7% compared to the state-of-the-art placer. Using our algorithm large topologies can be placed within a short runtime.",
keywords = "Optical Networks-on-Chip, Placement, Silicon photonics",
author = "{Von Beuningen}, Anja and Ulf Schlichtmann",
year = "2016",
month = apr,
day = "3",
doi = "10.1145/2872334.2872356",
language = "English",
series = "Proceedings of the International Symposium on Physical Design",
publisher = "Association for Computing Machinery",
pages = "27--34",
booktitle = "ISPD 2016 - Proceedings of the 2016 International Symposium on Physical Design",
note = "2016 International Symposium on Physical Design, ISPD 2016 ; Conference date: 03-04-2016 Through 06-04-2016",
}