PLACEBO: analog placement with efficient symmetry support

In this paper we present a new efficient approach to the placement problem of analog circuits. The resulting placement tool PLACEBO maintains a global view over all design steps of the circuit and is fully aware of symmetry constraints. Hence, large nested symmetries needed for mixed-signal, high-frequency, and high-power circuits can be handled without loosing quality. When designing analog circuits the strong interaction between a human designer and automatic tools makes fast algorithms necessary. By employing quadratic programming techniques for global placement followed by enumerative area optimization PLACEBO achieves typical CPU-times of few seconds, making it an excellent choice for an interactive design process. Two examples are presented. A high-speed CMOS comparator layout is compared to layouts of the same circuit published in other papers, and a BiCMOS band-pass-amplifier layout that has to be embedded on a mixed-signal chip is compared to the manual layout of a fabricated chip. We achieved the smallest layout size published for the comparator while fulfilling all required constraints. For the amplifier the synthesized layout is very similar to the manual one and about the same size.