Physical Synthesis of Flow-Based Microfluidic Biochips Considering Distributed Channel Storage

Flow-based microfluidic biochips (FBMBs) have attracted much attention over the past decade. On such a micrometer-scale platform, various biochemical applications, also called bioas-says, can be processed concurrently and automatically. To improve execution efficiency and reduce fabrication cost, a distributed channel-storage architecture (DCSA) can be implemented on this platform, where fluid samples can be cached temporarily in flow channels close to components. Although DCSA can improve the execution efficiency of FBMBs significantly, it requires a careful arrangement of fluid samples to enable the channels to fulfill the dual functions of transportation and caching. In this paper, we formulate the first flow-layer physical design problem considering DCSA, and propose a top-down synthesis algorithm to generate efficient solutions considering execution efficiency, washing, and resource usage simultaneously. Experimental results demonstrate that the proposed algorithm leads to a shorter execution time, less flow-channel length, and a higher efficiency of on-chip resource utilization for biochemical applications compared with a direct approach to incorporate distributed storage into existing frameworks.