Performance evaluation of network processor architectures: Combining simulation with analytical estimation

Samarjit Chakraborty, Simon Künzli, Lothar Thiele, Andreas Herkersdorf, Patricia Sagmeister

Research output: Contribution to journalArticlepeer-review

81 Scopus citations

Abstract

Simulation was combined with analytic estimation to study performance evaluation of network processor architectures. A scheme for the design space exploration of the systems-on-a-chip (SoC) architecture was proposed. The design process was separated into multiple stages, each having a different level of abstraction.

Original languageEnglish
Pages (from-to)641-665
Number of pages25
JournalComputer Networks
Volume41
Issue number5
DOIs
StatePublished - 5 Apr 2003
Externally publishedYes

Keywords

  • Application-specific instruction set processors
  • High-performance routers
  • Network processors
  • Performance analysis

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