@inproceedings{67092d43154e4b51886d366347bfdf9c,
title = "Performance aspects of correctness-oriented synthesis flows",
abstract = "When designing electronic circuits, available synthesis flows either focus on accelerating the synthesized circuit or correctness. In the quest for ever-faster hardware designs, the correctness of these designs is often neglected. Thus, designers need to trade-off between correctness and performance. The question is how large the trade-off is? This work presents a systematic comparison of two representative synthesis flows, the LegUp HLS framework as a representative for flows focusing on hardware acceleration, and a flow based on the proof assistant Coq focusing on correctness. For evaluation purposes, a 32-bit MIPS processor synthesized using the two flows, and the final HDL implementations are compared regarding their performance. Our evaluation allows a quantitative analysis of the trade-off, showing that correctness-oriented synthesis flows are competitive concerning performance.",
keywords = "Functional HDLs, Hardware designs, Hardware synthesis, MIPS processor, Proof assistants",
author = "Fritjof Bornebusch and Christoph L{\"u}th and Robert Wille and Rolf Drechsler",
note = "Publisher Copyright: Copyright {\textcopyright} 2021 by SCITEPRESS – Science and Technology Publications, Lda. All rights reserved.; 9th International Conference on Model-Driven Engineering and Software Development, MODELSWARD 2021 ; Conference date: 08-02-2021 Through 10-02-2021",
year = "2021",
language = "English",
series = "MODELSWARD 2021 - Proceedings of the 9th International Conference on Model-Driven Engineering and Software Development",
publisher = "SciTePress",
pages = "76--86",
editor = "Slimane Hammoudi and Pires, {Luis Ferreira} and Edwin Seidewitz and Richard Soley",
booktitle = "MODELSWARD 2021 - Proceedings of the 9th International Conference on Model-Driven Engineering and Software Development",
}