Patterning Platinum by Selective Wet Etching of Sacrificial Pt-A1 Alloy

S. Meier, H. Rinck, B. Lange, E. Muellner, R. Brederlow, M. Enzelberger-Heim, S. Summerfelt, F. Kreupl, B. Wolf

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

2 Scopus citations

Abstract

Regardless of its functionality, there is no IC-compatible process to pattern platinum. This can be attributed to the inertness of the noble metal. Pt survives extreme conditions, and is used in electrochemical, temperature, and gas sensors. In this paper, we introduce a process enabling Pt structures of 1 μm thickness and submicron feature size on 200mm wafers. It is the industry's first with focus on high process control while eliminating contamination issues. This is achieved by locally alloying the Pt with a sacrificial Al layer. The so-formed PtAl2 is then removed by a selective wet-etch, which leaves a uniform Pt structure. The process is VLSI compatible, and can be adapted to any semiconductor fab to have a platinum processing capability. Pt as a third metal besides Al and Cu is a significant enabler for IC sensor technology.

Original languageEnglish
Title of host publication4th Electron Devices Technology and Manufacturing Conference, EDTM 2020 - Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781728125381
DOIs
StatePublished - Apr 2020
Event4th Electron Devices Technology and Manufacturing Conference, EDTM 2020 - Penang, Malaysia
Duration: 6 Apr 202021 Apr 2020

Publication series

Name4th Electron Devices Technology and Manufacturing Conference, EDTM 2020 - Proceedings

Conference

Conference4th Electron Devices Technology and Manufacturing Conference, EDTM 2020
Country/TerritoryMalaysia
CityPenang
Period6/04/2021/04/20

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