TY - GEN
T1 - Optimizing DD-based synthesis of reversible circuits using negative control lines
AU - Schonborn, Eleonora
AU - Datta, Kamalika
AU - Wille, Robert
AU - Sengupta, Indranil
AU - Rahaman, Hafizur
AU - Drechsler, Rolf
N1 - Publisher Copyright:
© 2014 IEEE.
PY - 2014/7/30
Y1 - 2014/7/30
N2 - Synthesis of reversible circuits has attracted the attention of many researchers. In particular, approaches based on Decision Diagrams (DDs) have been shown beneficial since they enable the realization of corresponding circuits for large functions. However, all existing approaches rely on a gate library composed of positive control lines only. Recently, it has been shown that the additional use of negative control lines enables significant reductions of the respective circuit costs. In this paper, we aim for exploiting this potential. To this end, two complementary schemes are investigated. First, a post-synthesis optimization that exploits the power of negative control lines is utilized to optimize the circuits generated by previously proposed DD-based methods. Second, negative control lines are explicitly considered during synthesis. Experimental results demonstrate that the proposed approaches result in a significant reduction with respect to gate count as well as quantum costs.
AB - Synthesis of reversible circuits has attracted the attention of many researchers. In particular, approaches based on Decision Diagrams (DDs) have been shown beneficial since they enable the realization of corresponding circuits for large functions. However, all existing approaches rely on a gate library composed of positive control lines only. Recently, it has been shown that the additional use of negative control lines enables significant reductions of the respective circuit costs. In this paper, we aim for exploiting this potential. To this end, two complementary schemes are investigated. First, a post-synthesis optimization that exploits the power of negative control lines is utilized to optimize the circuits generated by previously proposed DD-based methods. Second, negative control lines are explicitly considered during synthesis. Experimental results demonstrate that the proposed approaches result in a significant reduction with respect to gate count as well as quantum costs.
UR - http://www.scopus.com/inward/record.url?scp=84938766208&partnerID=8YFLogxK
U2 - 10.1109/DDECS.2014.6868776
DO - 10.1109/DDECS.2014.6868776
M3 - Conference contribution
AN - SCOPUS:84938766208
T3 - Proceedings of the 2014 IEEE 17th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2014
SP - 129
EP - 134
BT - Proceedings of the 2014 IEEE 17th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2014
A2 - Pleskacz, Witold
A2 - Renovell, Michel
A2 - Kasprowicz, Dominik
A2 - Sekanina, Lukas
A2 - Bernard, Serge
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 17th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2014
Y2 - 23 April 2014 through 25 April 2014
ER -