TY - GEN
T1 - Optimal dimensioning of active cell balancing architectures
AU - Narayanaswamy, Swaminathan
AU - Steinhorst, Sebastian
AU - Lukasiewycz, Martin
AU - Kauer, Matthias
AU - Chakraborty, Samarjit
PY - 2014
Y1 - 2014
N2 - This paper presents an approach to optimal dimensioning of active cell balancing architectures, which are of increasing relevance in Electrical Energy Storages (EESs) for Electric Vehicles (EVs) or stationary applications such as smart grids. Active cell balancing equalizes the state of charge of cells within a battery pack via charge transfers, increasing the effective capacity and lifetime. While optimization approaches have been introduced into the design process of several aspects of EESs, active cell balancing architectures have, until now, not been systematically optimized in terms of their components. Therefore, this paper analyzes existing architectures to develop design metrics for energy dissipation, installation volume, and balancing current. Based on these design metrics, a methodology to efficiently obtain Pareto-optimal configurations for a wide range of inductors and transistors at different balancing currents is developed. Our methodology is then applied to a case study, optimizing two state-of-the-art architectures using realistic balancing algorithms. The results give evidence of the applicability of systematic optimization in the domain of cell balancing, leading to higher energy efficiencies with minimized installation space.
AB - This paper presents an approach to optimal dimensioning of active cell balancing architectures, which are of increasing relevance in Electrical Energy Storages (EESs) for Electric Vehicles (EVs) or stationary applications such as smart grids. Active cell balancing equalizes the state of charge of cells within a battery pack via charge transfers, increasing the effective capacity and lifetime. While optimization approaches have been introduced into the design process of several aspects of EESs, active cell balancing architectures have, until now, not been systematically optimized in terms of their components. Therefore, this paper analyzes existing architectures to develop design metrics for energy dissipation, installation volume, and balancing current. Based on these design metrics, a methodology to efficiently obtain Pareto-optimal configurations for a wide range of inductors and transistors at different balancing currents is developed. Our methodology is then applied to a case study, optimizing two state-of-the-art architectures using realistic balancing algorithms. The results give evidence of the applicability of systematic optimization in the domain of cell balancing, leading to higher energy efficiencies with minimized installation space.
UR - http://www.scopus.com/inward/record.url?scp=84903852031&partnerID=8YFLogxK
U2 - 10.7873/DATE2014.153
DO - 10.7873/DATE2014.153
M3 - Conference contribution
AN - SCOPUS:84903852031
SN - 9783981537024
T3 - Proceedings -Design, Automation and Test in Europe, DATE
BT - Proceedings - Design, Automation and Test in Europe, DATE 2014
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 17th Design, Automation and Test in Europe, DATE 2014
Y2 - 24 March 2014 through 28 March 2014
ER -