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On the impact of the synchronization constraint and interconnections in quantum-dot cellular automata

  • Frank Sill Torres
  • , Pedro A. Silva
  • , Geraldo Fontes
  • , Marcel Walter
  • , José Augusto M. Nacif
  • , Ricardo Santos Ferreira
  • , Omar Paranaiba Vilela Neto
  • , Jeferson F. Chaves
  • , Robert Wille
  • , Philipp Niemann
  • , Daniel Große
  • , Rolf Drechsler
  • Deutsches Zentrum für Luft- und Raumfahrt (DLR)
  • Federal University of Viçosa
  • University of Bremen
  • Universidade Federal de Minas Gerais
  • Centro Federal de Educação Tecnológica de Minas Gerais
  • Johannes Kepler University Linz
  • DFKI

Research output: Contribution to journalArticlepeer-review

16 Scopus citations

Abstract

Quantum-dot Cellular Automata (QCA) is an emerging nanotechnology with remarkable performance and energy efficiency. Computation and information transfer in QCA are based on field forces rather than electric currents. As a consequence, new strategies are required for design automation approaches in order to cope with the arising challenges. One of these challenges is the transport of information, which is affected by two particularities of the QCA technology. First, information flow in QCA is controlled by external clocks, and second, QCA is a planar technology in which gates, as well as interconnections, are mostly located in the same layer. The former demands proper synchronization already during the circuit design phase, while the latter results in high area costs for interconnections. This work focuses on both constraints and discusses its impact on the implementation of QCA circuits. Further, the concept of local and global synchronicity in QCA circuits is explored. The obtained results indicate that relaxing the global synchronicity constraint can reduce design size by about 70% while the throughput performance declines by similar values. Additionally, it can be shown that the impact of interconnections in QCA, like wires, fan-outs, and crossovers, is indeed substantial. That means, up to 75% of the total area is occupied by interconnections.

Original languageEnglish
Article number103109
JournalMicroprocessors and Microsystems
Volume76
DOIs
StatePublished - Jul 2020
Externally publishedYes

UN SDGs

This output contributes to the following UN Sustainable Development Goals (SDGs)

  1. SDG 7 - Affordable and Clean Energy
    SDG 7 Affordable and Clean Energy

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