On the applicability of single-walled carbon nanotubes as VLSI interconnects

Navin Srivastava, Hong Li, Franz Kreupl, Kaustav Banerjee

Research output: Contribution to journalArticlepeer-review

184 Scopus citations

Abstract

This paper presents a comprehensive study of the applicability of single-walled carbon nanotubes (SWCNTs) as interconnects in nanoscale integrated circuits. A detailed analysis of SWCNT interconnect resistance (considering its dependence on all physical parameters, as well as factors affecting the contact resistance), the first full 3-D capacitance simulations of SWCNT bundles for realistic very large scale integration (VLSI) interconnect dimensions, and a quantitative evaluation of the importance of inductive effects in SWCNT interconnects are presented. The applicability of carbon nanotube (CNT) based vias (vertical interconnects)the most realizable CNT interconnects in the current state of the artis addressed for the first time. It is shown that CNT interconnects can provide 3040 improvement in the delay of millimeter-long global interconnects. The applicability of CNT monolayers as local interconnects is found to be much more limited than that reported in the prior literature. Dense CNT bundle global interconnects are shown to offer a 4\times reduction in power dissipation while achieving the same delay as optimally buffered Cu interconnects at the 22 nm node. This power saving increases to 8$\times$ at the 14 nm node. Furthermore, 3-D finite-element electrothermal simulations show that CNT bundles used as vias in between Cu metal layers can provide large improvement in metal interconnect lifetime by lowering the temperature of the hottest interconnects.

Original languageEnglish
Article number4768724
Pages (from-to)542-559
Number of pages18
JournalIEEE Transactions on Nanotechnology
Volume8
Issue number4
DOIs
StatePublished - Jul 2009
Externally publishedYes

Keywords

  • Carbon nanotube (CNT)
  • Performance
  • Power
  • Reliability
  • Thermal management
  • Very large scale integration (VLSI) interconnect

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