On partitioning of multistage algorithms and design of intermediate memories

Matthias Sauer, Ernst Bernard, Josef A. Nossek

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

In this paper partitioning of a class of algorithms with global data dependencies, called multistage algorithms, is investigated. Partitioning requires intermediate results of computations of a specific block of the partition to be stored in an intermediate memory. Furthermore a decomposition of the global interconnection structure of the algorithm is necessary. We outline a design methodology for the intermediate memories which perform the data rearrangements according to the interconnection relation and that consist of locally connected synchronous modules. Additionally procedures for deriving control signals for the intermediate memory are presented, which can serve as a basis for control minimization.

Original languageEnglish
Title of host publicationProceedings of the International Conference on Application
PublisherPubl by IEEE
Pages89-101
Number of pages13
ISBN (Print)0818629673
StatePublished - 1992
EventProceedings of the International Conference on Application Specific Array Processors - Berkeley, CA, USA
Duration: 4 Aug 19927 Aug 1992

Publication series

NameProceedings of the International Conference on Application

Conference

ConferenceProceedings of the International Conference on Application Specific Array Processors
CityBerkeley, CA, USA
Period4/08/927/08/92

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