Novel approaches to circuit timing

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

In conventional sequential digital design, flip-flops are used to separate combinational logic gates. Signal propagation across logic gates ends at flip-flops. Accordingly, the minimum clock period is determined by the maximum of combinational delays between flip-flops. This partitioning of combinational logic into stages reduces design complexity significantly. However, in modern high-performance designs where clock frequency is usually pushed to the limit, this strict logic separation by flip-flops sacrifices timing performance. In addition, the simple assumption that all combinational paths work within one clock period makes the task to prevent counterfeiting very challenging, because a netlist extracted from reverse engineering represents all the functional information and can be processed using a standard IC design flow and used to produce chips in different foundries illegally. In this paper, we demonstrate two techniques that loosen the conventional strict separation of logic gates with flip-flops to enhance circuit performance and to reinforce netlist security.

Original languageEnglish
Title of host publicationChina Semiconductor Technology International Conference 2018, CSTIC 2018
EditorsHanming Wu, Peilin Song, Qinghuang Lin, Yuchun Wang, Cor Claeys, Hsiang-Lang Lung, Ying Zhang, Steve Liang, Yiyu Shi, Ru Huang, Zhen Guo, Kafai Lai
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages1-4
Number of pages4
ISBN (Electronic)9781538653081
DOIs
StatePublished - 29 May 2018
Event2018 China Semiconductor Technology International Conference, CSTIC 2018 - Shanghai, China
Duration: 11 Mar 201812 Mar 2018

Publication series

NameChina Semiconductor Technology International Conference 2018, CSTIC 2018

Conference

Conference2018 China Semiconductor Technology International Conference, CSTIC 2018
Country/TerritoryChina
CityShanghai
Period11/03/1812/03/18

Fingerprint

Dive into the research topics of 'Novel approaches to circuit timing'. Together they form a unique fingerprint.

Cite this