Abstract
This paper deals with retiming, a register reconfiguration technique, introduced by Leiserson and Saxe [1,2], to speed up VLSI circuits. Retiming is generally formulated as an optimization problem which is solvable applying linear-programming algorithms. This work presents a different way of considering retiming. A loop analysis, related to network theory, is developed to evaluate all possible retiming solutions. Based on the circuit model used in Leiserson's paper, the incidence matrix of the circuit is formulated in order to find the linearly independent loops which are needed to represent all register configurations. Finally, the set of all retiming solutions is efficiently reduced to those, which fulfill design and timing constraints and thus, the designer is able to choose an appropriate one for implementation.
| Original language | English |
|---|---|
| Pages (from-to) | 35-38 |
| Number of pages | 4 |
| Journal | Proceedings - IEEE International Symposium on Circuits and Systems |
| Volume | 4 |
| State | Published - 1994 |
| Event | Proceedings of the 1994 IEEE International Symposium on Circuits and Systems. Part 3 (of 6) - London, England Duration: 30 May 1994 → 2 Jun 1994 |
Fingerprint
Dive into the research topics of 'New retiming algorithm for circuit design'. Together they form a unique fingerprint.Cite this
- APA
- Author
- BIBTEX
- Harvard
- Standard
- RIS
- Vancouver