TY - GEN
T1 - Multilevel synchronous optimal pulsewidth modulation generalized formulation
AU - Lago, Jackson
AU - Heldwein, Marcelo Lobo
PY - 2014
Y1 - 2014
N2 - With the growing interest of the industry in high power medium voltage multilevel inverters and the technological limitation in high voltage power semiconductors switches, the synchronous optimal pulsewidth modulation technique, originally developed for two/three-level inverters, became once again a topic of interest, now to optimize multilevel waveforms. This work proposes a new formulation for the problem of optimizing the modulation pattern of multilevel converters, including in a single optimization problem the decision of the directions for each step transition in addition to the switching angles and, thus, completely defining the optimized multilevel waveform for a given modulation index.
AB - With the growing interest of the industry in high power medium voltage multilevel inverters and the technological limitation in high voltage power semiconductors switches, the synchronous optimal pulsewidth modulation technique, originally developed for two/three-level inverters, became once again a topic of interest, now to optimize multilevel waveforms. This work proposes a new formulation for the problem of optimizing the modulation pattern of multilevel converters, including in a single optimization problem the decision of the directions for each step transition in addition to the switching angles and, thus, completely defining the optimized multilevel waveform for a given modulation index.
UR - http://www.scopus.com/inward/record.url?scp=84906810215&partnerID=8YFLogxK
U2 - 10.1109/COMPEL.2014.6877111
DO - 10.1109/COMPEL.2014.6877111
M3 - Conference contribution
AN - SCOPUS:84906810215
SN - 9781479921478
T3 - 2014 IEEE 15th Workshop on Control and Modeling for Power Electronics, COMPEL 2014
BT - 2014 IEEE 15th Workshop on Control and Modeling for Power Electronics, COMPEL 2014
PB - IEEE Computer Society
T2 - 2014 IEEE 15th Workshop on Control and Modeling for Power Electronics, COMPEL 2014
Y2 - 22 June 2014 through 25 June 2014
ER -