Multicore power estimation using independent component analysis based modeling

State-of-The-Art power estimation research for multicore processors combine performance counters that collect run-Time activity information with an offline-generated power model. To generate these power models, the package power is measured and the activity information is traced while synthetic workloads are executed. These workloads stress distinct core components in order to expose power responses so that the activity information has low collinearity. The measurements are then combined into a power model describing the general power behavior. However, one of the main drawbacks of these synthetic workloads is that they are most of the time custom-designed for a given multi-core architecture and are hardly available. In this paper, we present a methodology to generate power models using freely available benchmarks, e.g. PARSEC/Splash-2. To minimize the collinearity of the activity information due to the uncontrolled/unspecified behavior of these more general benchmarks, we propose to use independent component analysis. This allows to avoid the use of synthetic workloads and a reduction of the relative error by 24% in the average case, when compared to prior state-of-The-Art work. Although, we also observe an increase of 22% relative error in the worst case for our approach, this can easily be improved by using either different or more training benchmarks. These promising results give a strong indication that independent component analysis could directly be used with real application workload, leading to the possibility to build/improve power models during runtime.