Multi-terminal pulsed force & sense ESD verification of I/O libraries and ESD simulations

Stephan Drüen; Martin Streibl; Kai Esmark; Krzysztof Domanski; Josef Niemesheim; Harald Gossner; Doris Schmitt-Landsiedel

doi:10.1109/EOSESD.2004.5272589

Multi-terminal pulsed force & sense ESD verification of I/O libraries and ESD simulations

Stephan Drüen, Martin Streibl, Kai Esmark, Krzysztof Domanski, Josef Niemesheim, Harald Gossner, Doris Schmitt-Landsiedel

Medicine and Health

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

Abstract

A multi-terminal TLP measurement technique is used for accessing current and voltage distributions during ESD in typical I/O cell frames in a 0.13um CMOS technology. The procedure extends traditional I/O library testchip based ESD verification and qualification tests, allows to calibrate ESD chip-level simulation tools and to derive precise I/O library application rules.

Original language	English
Title of host publication	2004 Electrical Overstress/Electrostatic Discharge Symposium, EOS/ESD '04
DOIs	https://doi.org/10.1109/EOSESD.2004.5272589
State	Published - 2004
Event	2004 Electrical Overstress/Electrostatic Discharge Symposium, EOS/ESD '04 - Grapevine, TX, United States Duration: 19 Sep 2004 → 23 Sep 2004

Publication series

Name	Electrical Overstress/Electrostatic Discharge Symposium Proceedings
ISSN (Print)	0739-5159

Conference

Conference	2004 Electrical Overstress/Electrostatic Discharge Symposium, EOS/ESD '04
Country/Territory	United States
City	Grapevine, TX
Period	19/09/04 → 23/09/04

Access to Document

10.1109/EOSESD.2004.5272589

Cite this

Drüen, S., Streibl, M., Esmark, K., Domanski, K., Niemesheim, J., Gossner, H., & Schmitt-Landsiedel, D. (2004). Multi-terminal pulsed force & sense ESD verification of I/O libraries and ESD simulations. In 2004 Electrical Overstress/Electrostatic Discharge Symposium, EOS/ESD '04 Article 5272589 (Electrical Overstress/Electrostatic Discharge Symposium Proceedings). https://doi.org/10.1109/EOSESD.2004.5272589

@inproceedings{0a91474012ad45fdae7eb046b451833d,

title = "Multi-terminal pulsed force & sense ESD verification of I/O libraries and ESD simulations",

abstract = "A multi-terminal TLP measurement technique is used for accessing current and voltage distributions during ESD in typical I/O cell frames in a 0.13um CMOS technology. The procedure extends traditional I/O library testchip based ESD verification and qualification tests, allows to calibrate ESD chip-level simulation tools and to derive precise I/O library application rules.",

author = "Stephan Dr{\"u}en and Martin Streibl and Kai Esmark and Krzysztof Domanski and Josef Niemesheim and Harald Gossner and Doris Schmitt-Landsiedel",

year = "2004",

doi = "10.1109/EOSESD.2004.5272589",

language = "English",

isbn = "1585370630",

series = "Electrical Overstress/Electrostatic Discharge Symposium Proceedings",

booktitle = "2004 Electrical Overstress/Electrostatic Discharge Symposium, EOS/ESD '04",

note = "2004 Electrical Overstress/Electrostatic Discharge Symposium, EOS/ESD '04 ; Conference date: 19-09-2004 Through 23-09-2004",

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Drüen, S, Streibl, M, Esmark, K, Domanski, K, Niemesheim, J, Gossner, H & Schmitt-Landsiedel, D 2004, Multi-terminal pulsed force & sense ESD verification of I/O libraries and ESD simulations. in 2004 Electrical Overstress/Electrostatic Discharge Symposium, EOS/ESD '04., 5272589, Electrical Overstress/Electrostatic Discharge Symposium Proceedings, 2004 Electrical Overstress/Electrostatic Discharge Symposium, EOS/ESD '04, Grapevine, TX, United States, 19/09/04. https://doi.org/10.1109/EOSESD.2004.5272589

Multi-terminal pulsed force & sense ESD verification of I/O libraries and ESD simulations. / Drüen, Stephan; Streibl, Martin; Esmark, Kai et al.
2004 Electrical Overstress/Electrostatic Discharge Symposium, EOS/ESD '04. 2004. 5272589 (Electrical Overstress/Electrostatic Discharge Symposium Proceedings).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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AU - Gossner, Harald

AU - Schmitt-Landsiedel, Doris

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N2 - A multi-terminal TLP measurement technique is used for accessing current and voltage distributions during ESD in typical I/O cell frames in a 0.13um CMOS technology. The procedure extends traditional I/O library testchip based ESD verification and qualification tests, allows to calibrate ESD chip-level simulation tools and to derive precise I/O library application rules.

AB - A multi-terminal TLP measurement technique is used for accessing current and voltage distributions during ESD in typical I/O cell frames in a 0.13um CMOS technology. The procedure extends traditional I/O library testchip based ESD verification and qualification tests, allows to calibrate ESD chip-level simulation tools and to derive precise I/O library application rules.

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AN - SCOPUS:77950829027

SN - 1585370630

SN - 9781585370634

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BT - 2004 Electrical Overstress/Electrostatic Discharge Symposium, EOS/ESD '04

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Y2 - 19 September 2004 through 23 September 2004

ER -

Multi-terminal pulsed force & sense ESD verification of I/O libraries and ESD simulations

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