MQT SyReC: A Tool for HDL-based Synthesis of Reversible Circuits

Lukas Burgholzer (Developer), Smaran Adarsh (Developer), Robert Wille (Other)

Research output: Non-textual form › Software

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SyReC Synthesizer: An MQT tool for synthesis of reversible circuits
Adarsh, S., Burgholzer, L., Manjunath, T. & Wille, R., Nov 2022, In: Software Impacts. 14, 100451.
Research output: Contribution to journal › Article › peer-review

Open Access
2 Scopus citations
One-Pass Design of Reversible Circuits: Combining Embedding and Synthesis for Reversible Logic
Zulehner, A. & Wille, R., May 2018, In: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 37, 5, p. 996-1008 13 p.
Research output: Contribution to journal › Article › peer-review
58 Scopus citations
SyReC: A programming language for synthesis of reversible circuits
Wille, R., Offermann, S. & Drechsler, R., 2012, System Specification and Design Languages - Selected Contributions from FDL 2010. p. 207-222 16 p. (Lecture Notes in Electrical Engineering; vol. 106 LNEE).
Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review
5 Scopus citations