Abstract
Emerging applications mostly require both, high performance as well as support of a wide variety of communication services. For example, audio, video, and data transmission may require highly different services. An additional challenge arises by the growing demand for multipoint communication services. ATM networks are capable of satisfying the basic application requirements by providing multipoint bearer services [ 11 with guaranteed quality of service at data rates exceeding a gigabit per second. However, current communication subsystems (including higher layer protocols) that provide reliable services are not able to deliver the available network perfomance to the applications [Z], [3]. They also face difficulties in supporting the service guarantees provided by the ATM network. In particular in multipoint communication scenarios of multimedia applications, severe degradations of service quality may be observed. To provide high performance multimedia multipoint services, suited implementations of communication subsystems are increasingly required [4], [5]. They may comprise of dedicated VLSI components for time-critical processing tasks, such as retransmission support or memory management. In the paper, a framework for the provision of multipoint multimedia services in ATM networks and heterogeneous internetwork is presented. It provides support for processing of layer 3 and 4 protocol functions in end and intermediate systems for enhancing the network bearer service. The use of dedicated hardware components for network and transport layer processing allows for the provision of reliable services with puaranteed quality of service, without requiring radical changes in the operating system of existing computer platfomis. The paper presents how dedicated hardware components for network and transport layer functions may be integrated into end systems, as well as in dedicated intermediate systems with error control called Group Communication Servers. A modular VLSI implementation architecture designed around specialized components is presented that allows for service flexibility. The components can be reprogrammed using microprograms and may be selected individually depending on the service required by the application. The architecture is specifically designed for implementing complex connection oriented protocols with advanced protocol mechanisms [6 1, [7]. Specific support for processing intensive functions is given. For example, selective retransmission is provided by a dedicated VLSI component. The architecture is highly independent of the specific protocol to be implemented and, thus, forms a general implementation platform for high-perfomlance communication protocols. The Xpress Transfer Protocol (XTP) [8] is a good candidate for the envisaged applications.
Original language | English |
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Pages | 11-19 |
Number of pages | 9 |
DOIs | |
State | Published - 1995 |
Externally published | Yes |
Event | 3rd IEEE Workshop on the Architecture and Implementation of High Performance Communication Subsystems, HPCS 1995 - Mystic, United States Duration: 23 Aug 1995 → 25 Aug 1995 |
Conference
Conference | 3rd IEEE Workshop on the Architecture and Implementation of High Performance Communication Subsystems, HPCS 1995 |
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Country/Territory | United States |
City | Mystic |
Period | 23/08/95 → 25/08/95 |